Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a bias voltage source and the floating diffusion. The reset transistor is configured to be switched in response to a reset control signal. A lateral overflow integration capacitor (LOFIC) including an insulating region disposed between a first metal electrode and a second metal electrode is also included. The first metal electrode is coupled to a bias voltage source. The second metal electrode is coupled to the reset transistor and selectively coupled to the floating diffusion.

Abstract: A pixel circuit includes a transfer transistor is coupled between a photodiode and a floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A lateral overflow integration capacitor (LOFIC) includes an insulating region between a first metal electrode and a second metal electrode that is coupled to a first reset transistor and selectively coupled to the floating diffusion. A second reset transistor and a bias voltage source are coupled to the first metal electrode. During an idle period, the first reset transistor is configured to be on, the second reset transistor is configured to be off, and the bias voltage source is configured to provide a first bias voltage to the first metal electrode to reverse bias the LOFIC. The first bias voltage is less than a reset voltage provided from the reset voltage source.

Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A transfer transistor is configured to transfer the image charge from the photodiode to a floating diffusion. A reset transistor coupled between a reset voltage source and the floating diffusion. A lateral overflow integration capacitor (LOFIC) includes an insulating region disposed between a first metal electrode and a second metal electrode. The first metal electrode is coupled to a bias voltage source, the second metal electrode is selectively coupled to the floating diffusion, and excess image charge photogenerated by the photodiode during an idle period is configured to overflow from the photodiode through the transfer transistor into the floating diffusion.

Abstract: A pixel circuit includes a transfer transistor coupled between a photodiode and a floating diffusion. A lateral overflow integration capacitor (LOFIC) includes an insulating region disposed between a first metal electrode coupled to a bias voltage source, and a second metal electrode selectively coupled to the floating diffusion. A multifunction reset transistor includes a gate, a drain, a first source, and a second source. The drain, the first source, and the second source are coupled to each other in response to a multifunction reset control signal turning the multifunction reset transistor on. The drain, the first source, and the second source are decoupled from one another in response to the multifunction reset control signal turning the multifunction reset transistor off. The drain is coupled to a reset voltage source, the first source is coupled to the first metal electrode, and the second source is coupled to the second metal electrode.

Abstract: An imaging device includes a photodiode array. The photodiodes include a first set of photodiodes configured as image sensing photodiodes and a second set of photodiodes configured as phase detection auto focus (PDAF) photodiodes. The PDAF photodiodes are arranged in at least pairs in neighboring columns and are interspersed among the image sensing photodiodes. Transfer transistors are coupled to corresponding photodiodes. The transfer transistors coupled to the image sensing photodiodes included in an active row of are controlled in response to a first transfer control signal or a second transfer control signal that control all of the image sensing photodiodes of the active row. A transfer transistor is coupled to one of a pair of the PDAF photodiodes of the active row. The first transfer transistor is controlled in response to a first PDAF control signal that is independent of the first or second transfer control signals.

Abstract: A pixel circuit includes a photodiode, a floating diffusion, and a conduction gate channel of a multi-gate transfer block disposed in a semiconductor material layer. The multi-gate transfer block is coupled to the photodiode, the floating diffusion, and an overflow capacitor. The multi-gate transfer block also includes first, second, and third gates that are disposed proximate to the single conduction gate channel region. The conduction gate channel is a single region shared among the first, second, and third gates. Overflow image charge generated in the photodiode leaks from the photodiode into the conduction gate channel to the overflow capacitor in response to the first gate, which is coupled between the photodiode and the conduction gate channel, receiving a first gate OFF signal and the second gate, which is coupled between the conduction gate channel and the overflow capacitor, receiving a second gate ON signal.

Abstract: Low noise silicon-germanium (SiGe) image sensor. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor substrate. The photodiodes of an individual pixel are configured to receive an incoming light through an illuminated surface of the semiconductor substrate. The semiconductor substrate includes a first layer of semiconductor material having silicon (Si); and a second layer of semiconductor material having silicon germanium (Si1-xGex). A concentration x of Ge changes gradually through at least a portion of thickness of the second layer. Each photodiode includes a first doped region extending through the first layer of semiconductor material and the second layer of semiconductor material; and a second doped region extending through the first layer of semiconductor material and the second layer of semiconductor material.

Abstract: Low noise silicon-germanium (SiGe) image sensor. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor substrate. The photodiodes of an individual pixel are configured to receive an incoming light through an illuminated surface of the semiconductor substrate. The semiconductor substrate includes a first layer of semiconductor material having silicon (Si); and a second layer of semiconductor material having silicon germanium (Si1-xGex). A concentration x of Ge changes gradually through at least a portion of thickness of the second layer. Each photodiode includes a first doped region extending through the first layer of semiconductor material and the second layer of semiconductor material; and a second doped region extending through the first layer of semiconductor material and the second layer of semiconductor material.

Abstract: An imaging device includes a photodiode array. The photodiodes include a first set of photodiodes configured as image sensing photodiodes and a second set of photodiodes configured as phase detection auto focus (PDAF) photodiodes. The PDAF photodiodes are arranged in at least pairs in neighboring columns and are interspersed among the image sensing photodiodes. Transfer transistors are coupled to corresponding photodiodes. The transfer transistors coupled to the image sensing photodiodes included in an active row of are controlled in response to a first transfer control signal or a second transfer control signal that control all of the image sensing photodiodes of the active row. A transfer transistor is coupled to one of a pair of the PDAF photodiodes of the active row. The first transfer transistor is controlled in response to a first PDAF control signal that is independent of the first or second transfer control signals.

Abstract: A pixel cell includes an electrically conductive tunnel contact formed across a surface of a source follower gate, the tunnel contact having a first end, a second end, and an intermediate portion between the first and second ends. The first end is coupled to a floating diffusion FD, the second end is coupled to the first doped region of a reset transistor RST. The tunnel contact is formed in physical and in electrical contact with the surface of the source follower gate for a length of the intermediate portion substantially equal to a width of the source follower gate. Methods of forming the pixel cell are also described.

Abstract: A pixel circuit includes a photodiode disposed in a semiconductor material layer to accumulate image charge in response to light incident upon the photodiode. A charge collection gate is coupled to the photodiode. The charge collection gate is disposed over the photodiode to generate an inversion layer in the semiconductor material layer under the charge collection gate to collect the image charge from the photodiode. A first transfer gate is disposed proximate to the charge collection gate, wherein the first transfer gate is coupled to transfer the image charge from in the inversion layer in response to a first transfer signal.

Abstract: A pixel circuit includes a photodiode, a floating diffusion, and a conduction gate channel of a multi-gate transfer block disposed in a semiconductor material layer. The multi-gate transfer block is coupled to the photodiode, the floating diffusion, and an overflow capacitor. The multi-gate transfer block also includes first, second, and third gates that are disposed proximate to the single conduction gate channel region. The conduction gate channel is a single region shared among the first, second, and third gates. Overflow image charge generated in the photodiode leaks from the photodiode into the conduction gate channel to the overflow capacitor in response to the first gate, which is coupled between the photodiode and the conduction gate channel, receiving a first gate OFF signal and the second gate, which is coupled between the conduction gate channel and the overflow capacitor, receiving a second gate ON signal.

Abstract: A pixel circuit includes a photodiode disposed in a semiconductor material layer to accumulate image charge in response to light incident upon the photodiode. A charge collection gate is coupled to the photodiode. The charge collection gate is disposed over the photodiode to generate an inversion layer in the semiconductor material layer under the charge collection gate to collect the image charge from the photodiode. A first transfer gate is disposed proximate to the charge collection gate, wherein the first transfer gate is coupled to transfer the image charge from in the inversion layer in response to a first transfer signal.

Abstract: A pixel circuit includes a photodiode in semiconductor material to accumulate image charge in response to incident light. A tri-gate charge transfer block coupled includes a single shared channel region the semiconductor material. A transfer gate, shutter gate, and switch gate are disposed proximate to the single shared channel region. The transfer gate transfers image charge accumulated in the photodiode to the single shared channel region in response to a transfer signal. The shutter gate transfers the image charge in the single shared channel region to a floating diffusion in the semiconductor material in response to a shutter signal. The switch gate is configured to couple the single shared channel region to a charge storage structure in the semiconductor material in response to a switch signal.

Abstract: Disclosed is a WDR pixel array having high sensitivity under the middle intensity of illumination and high intensity of illumination by using the 4T pixel structure representing high sensitivity under the low intensity of illumination. According to the embodiment, the overflow charges generated under the very high intensity of illumination are not discarded or partially stored, but read through the 3T pixel operation, so that the WDR pixel array having high sensitivity under the middle intensity of illumination and high intensity of illumination can be obtained based on the 4T pixel structure without additionally providing a transistor or a photodiode for the high intensity of illumination in the WDR pixel array.

Abstract: Provided are a pixel, a pixel array, and an image sensor including the pixel array. The pixel includes a photoelectric converter, a capacitor, a variable capacitor, and a switching element. The capacitor accumulates electric charges converted by the photoelectric converter. The variable capacitor is connected to the capacitor, and has capacitance varied according to a potential of the capacitor. The switching element outputs the potential of the capacitor.

Abstract: A pixel of an image sensor includes a polysilicon layer, and an active region which needs to be electrically coupled with the polysilicon layer, wherein the polysilicon layer extends over a portion of the active region, such that the polysilicon layer and the active region are partially overlapped, and the polysilicon layer and the active region are coupled through a buried contact structure.

Abstract: Disclosed is a WDR pixel array having high sensitivity under the middle intensity of illumination and high intensity of illumination by using the 4T pixel structure representing high sensitivity under the low intensity of illumination. According to the embodiment, the overflow charges generated under the very high intensity of illumination are not discarded or partially stored, but read through the 3T pixel operation, so that the WDR pixel array having high sensitivity under the middle intensity of illumination and high intensity of illumination can be obtained based on the 4T pixel structure without additionally providing a transistor or a photodiode for the high intensity of illumination in the WDR pixel array.

Abstract: Disclosed is a WDR pixel array having high sensitivity under the middle intensity of illumination and high intensity of illumination by using the 4T pixel structure representing high sensitivity under the low intensity of illumination. According to the embodiment, the overflow charges generated under the very high intensity of illumination are not discarded or partially stored, but read through the 3T pixel operation, so that the WDR pixel array having high sensitivity under the middle intensity of illumination and high intensity of illumination can be obtained based on the 4T pixel structure without additionally providing a transistor or a photodiode for the high intensity of illumination in the WDR pixel array.

Abstract: Disclosed is a WDR pixel array having high sensitivity under the middle intensity of illumination and high intensity of illumination by using the 4T pixel structure representing high sensitivity under the low intensity of illumination. According to the embodiment, the overflow charges generated under the very high intensity of illumination are not discarded or partially stored, but read through the 3T pixel operation, so that the WDR pixel array having high sensitivity under the middle intensity of illumination and high intensity of illumination can be obtained based on the 4T pixel structure without additionally providing a transistor or a photodiode for the high intensity of illumination in the WDR pixel array.