Abstract: A convolution block array for implementing neural network application, a method using the same, and a convolution block circuit are provided. The convolution block array includes a plurality of convolution block circuits configured to process a convolution operation of the neural network application, wherein each of the convolution block circuits comprises: a plurality of multiplier circuits configured to perform the convolution operation; and at least one adder circuit connected to the plurality of multiplier circuits and configured to perform an adding operation of results of the convolution operation and generate an output signal; where at least one of the convolution block circuits is configured to perform a biasing operation of the neural network application.

Abstract: A data processing method, a multichip system, and a non-transitory computer-readable medium for implementing a neuron network application are provided. The data processing method includes: allocating corresponding chips to process a corresponding part of a first stage data and a corresponding part of a second stage data; transmitting, by a first chip, a first part of the first stage data to a second chip through a channel; transmitting, by the second chip, a second part of the first stage data to the first chip through the channel; computing, by the first chip, the first stage data with a first part of weight values to obtain a first result, and computing, by the second chip, the first stage data with a second part of weight values to obtain a second result, where the first result and the second result are one of the second stage data.

Abstract: An apparatus and a method of implementing activation logic for a neural network are described. The apparatus comprises an input unit, a first address translated look-up table, an intermediate storage unit, a second address translated look-up table, and an output unit. The first address translated look-up table includes (2{circumflex over (?)}n1) first entries that map to (2{circumflex over (?)}n1) addresses based on the n bits of the input unit. Each the (2{circumflex over (?)}n1) first entries includes (n1?1) first preset values. The intermediate storage unit includes (n?1) bits. The second address translated look-up table includes (2{circumflex over (?)}(n?1)) second entries that map to the (2{circumflex over (?)}(n?1)) bit addresses based on of the (n?1) bits of the intermediate storage unit. Each the (2{circumflex over (?)}(n?1)) second entries includes (n2+1) second preset values.

Abstract: A communication device and method is provided, comprising: a signal modulator/demodulator having a digital signal processor for effecting radio communications; and an application processor (AP) having a central processing unit for controlling a plurality of peripherals, and a memory shared by the modem and the AP. The shared memory is accessed by the AP and the modem via a common bus. The plurality of peripherals include at least one of an image capture module, a display, and a flash memory.

Abstract: A communication device and method is provided, comprising: a signal modulator/demodulator having a digital signal processor for effecting radio communications; and an application processor (AP) having a central processing unit and a master controller for controlling via a common bus a plurality of peripherals including an interface with the signal modulator/demodulator, wherein a memory shared by the modem and the AP is controlled via the interface. The plurality of peripherals include at least one of an image capture module, a display, and a flash memory. The master controller controls the plurality of peripherals by issuing a packetized command commonly receivable by the plurality of peripherals over the common bus, the packetized command includes a module device select signal used for selecting one of the peripherals.

Abstract: A method of controlling an image data output of a portable device, a portable device having a signal detection unit and image processing unit are provided. The signal detection unit generates a photographing-disabled mode signal in response to a restricted area signal. The image processing unit has a photographing-disabled mode decision unit, an authentication decision unit and a control unit. The photographing-disabled mode decision unit determines whether the portable device is in the photographing-disabled mode or not based on the photographing-disabled mode signal. The authentication decision unit determines whether the portable device is authenticated or not when the portable device is in the photographing-disabled mode. The control unit outputs first photographed image data when the portable device is authenticated, and prohibits an output of the first photographed image data when the portable device is not authenticated.

Abstract: A memory system includes a first external device, a second external device, and a multi-port memory device connected to the first and second external devices. The multi-port memory system includes: a first port and a second port connected to the first and second external devices, respectively, a first bank group having at least one memory bank, the first bank group configured to be accessed by the first external device through the first data port; a second bank group having at least one memory bank, the second bank group configured to be accessed by the second external device through the second data port; a third bank group having at least one memory bank, wherein the third bank group is configured to be selectively accessed by the first external device through the first data port or the second external device through the second data port. The multi-port memory system may prevent data collisions which occur when two ports simultaneously attempt to access the same memory bank.

Abstract: A memory controller is provided which is connected to a nonvolatile memory (e.g., a NAND flash memory) and a volatile memory (e.g., a DRAM or SDRAM), where the memory controller controls an access to the nonvolatile memory and the volatile memory in response to a memory request, and includes a memory for storing address information of data stored in the volatile memory, and where the memory controller determines whether address information inputted at the memory request is identical to address information of the memory, and selectively accesses the nonvolatile memory according to the determined result.

Abstract: A memory system includes a first external device, a second external device, and a multi-port memory device connected to the first and second external devices. The multi-port memory system includes: a first port and a second port connected to the first and second external devices, respectively, a first bank group having at least one memory bank, the first bank group configured to be accessed by the first external device through the first data port; a second bank group having at least one memory bank, the second bank group configured to be accessed by the second external device through the second data port; a third bank group having at least one memory bank, wherein the third bank group is configured to be selectively accessed by the first external device through the first data port or the second external device through the second data port. The multi-port memory system may prevent data collisions which occur when two ports simultaneously attempt to access the same memory bank.

Abstract: A method of controlling an image data output of a portable device, a portable device having a signal detection unit and image processing unit are provided. The signal detection unit generates a photographing-disabled mode signal in response to a restricted area signal. The image processing unit has a photographing-disabled mode decision unit, an authentication decision unit and a control unit. The photographing-disabled mode decision unit determines whether the portable device is in the photographing-disabled mode or not based on the photographing-disabled mode signal. The authentication decision unit determines whether the portable device is authenticated or not when the portable device is in the photographing-disabled mode. The control unit outputs first photographed image data when the portable device is authenticated, and prohibits an output of the first photographed image data when the portable device is not authenticated.

Abstract: A multi-port memory device may provide a protection signal. The multi-port memory device may generate at least one protection signal in response to a bank address signal, in order to control access to the a memory bank, and to suppress access and/or memory collision.

Abstract: A memory controller is provided which is connected to a nonvolatile memory (e.g., a NAND flash memory) and a volatile memory (e.g., a DRAM or SDRAM), where the memory controller controls an access to the nonvolatile memory and the volatile memory in response to a memory request, and includes a memory for storing address information of data stored in the volatile memory, and where the memory controller determines whether address information inputted at the memory request is identical to address information of the memory, and selectively accesses the nonvolatile memory according to the determined result.

Abstract: A communication device and method is provided, comprising: a signal modulator/demodulator having a digital signal processor for effecting radio communications; and an application processor (AP) having a central processing unit and a master controller for controlling via a common bus a plurality of peripherals including an interface with the signal modulator/demodulator, wherein a memory shared by the modem and the AP is controlled via the interface. The plurality of peripherals include at least one of an image capture module, a display, and a flash memory. The master controller controls the plurality of peripherals by issuing a packetized command commonly receivable by the plurality of peripherals over the common bus, the packetized command includes a module device select signal used for selecting one of the peripherals.

Abstract: A communication device and method is provided, comprising: a signal modulator/demodulator having a digital signal processor for effecting radio communications; and an application processor (AP) having a central processing unit for controlling a plurality of peripherals, and a memory shared by the modem and the AP. The shared memory is accessed by the AP and the modem via a common bus. The plurality of peripherals include at least one of an image capture module, a display, and a flash memory.