Patents by Inventor Wouter Groothedde

Wouter Groothedde has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9602126
    Abstract: The present invention is related to a sigma-delta analog-to-digital converter (ADC). It further relates to a method for designing and manufacturing a sigma-delta ADC, and to a digital control loop comprising the same. According to the present invention, part of the filtering function required for noise-shaping is implemented in the feedback path. By suitably distributing the poles over the forward and feedback paths, stable operation can be achieved while offering low latency.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 21, 2017
    Assignee: TELEDYNE DALSA B.V.
    Inventors: Daniel Schinkel, Wouter Groothedde
  • Publication number: 20150341046
    Abstract: The present invention is related to a sigma-delta analog-to-digital converter (ADC). It further relates to a method for designing and manufacturing a sigma-delta ADC, and to a digital control loop comprising the same. According to the present invention, part of the filtering function required for noise-shaping is implemented in the feedback path. By suitably distributing the poles over the forward and feedback paths, stable operation can be achieved while offering low latency.
    Type: Application
    Filed: December 21, 2012
    Publication date: November 26, 2015
    Inventors: Daniel Schinkel, Wouter Groothedde
  • Patent number: 6853733
    Abstract: A two-wire interface for a digital microphone circuit includes a power line and a ground line. The interface utilizes the ground line as a “voltage active line” to transmit both clock and data signals between the digital microphone circuit and a receiving circuit. The digital microphone circuit detects the clock signal on the voltage active line and uses the detected clock signal to operate an ADC to provide digital data. The digital data is used to selectively drive current back to the receiving circuit over the voltage active line. The receiving circuit detects the transmitted data by monitoring the voltage associated with a line termination. The impedance associated with the line termination is switched by the receiver circuit to modulate the clock signal on the voltage active line.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: February 8, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Wouter Groothedde, Eric Antonius Maria Klumperink, Bram Nauta, Rudolphe Gustave Hubertus Eschauzier, Nico van Rijn