Abstract: A method of generating a hardware encoder includes generating a first directed graph characterizing a constraint set for a constrained system, identifying a scaling factor for an approximate eigenvector for the first directed graph, applying the scaling factor to the approximate eigenvector for the first directed graph to yield a scaled approximate eigenvector, partitioning arcs between each pair of states in the first directed graph, performing a state splitting operation on the first directed graph according to the partitioning of the arcs to yield a second directed graph, and generating the hardware encoder based on the second directed graph.

Abstract: An apparatus includes a low density parity check decoder operable to iteratively generate messages between a plurality of check nodes and variable nodes, and to calculate a fractional quality metric for a data block as it is decoded in the low density parity check decoder based at least in part on perceived values of data in the variable nodes. The fractional unsatisfied check quality metric is a probabilistic determination of a number of unsatisfied parity checks in the low density parity check decoder.

Abstract: Systems, methods, devices, circuits for data processing, and more particularly to data processing including adjacent track interference mitigation.

Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for determining head stability.

Abstract: The present invention is related to systems and methods for enhancing data detection in a data processing system. In one embodiment, a data processing system is disclosed that includes a data detector circuit that is governed at least in part based upon selected coefficients. The selected coefficients are selected as either a first set of coefficients or a second set of coefficients where the second set of coefficients has fewer coefficients than the first set of coefficients.

Abstract: A system is described for constructing maximum transition run modulation code based upon a multi-level run-length limited finite state machine. A processor is configured to receive information from a hard disk drive via a read channel and recover data from the hard disk drive using maximum transition run modulation code. A memory has computer executable instructions configured for execution by the processor to model a magnetic recording channel as a partial response channel, model a source of information to the magnetic recording channel to provide an optimized Markov source, and construct a maximum transition run modulation code to mimic the optimized Markov source based upon a finite state machine having a limited transition run length and a multi-level periodic structure.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes: a data decoder circuit and a local iteration adjustment circuit. The data decoder circuit is operable to perform a number of local iterations on a decoder input to yield a data output. The local iteration adjustment circuit is operable to generate a limit on the number of local iterations performed by the data decoder circuit.

Abstract: Various embodiments of the present invention provide data processing circuits that include: a data detector circuit, a data decoder circuit, and a modification circuit. The data detector circuit is operable to apply a data detection algorithm to a data input to yield a detected output. The data decoder circuit is operable to apply a data decode algorithm to a decode input to yield a decoded output. The decode input is selected between at least the detected output, and a modified version of the detected output. The modification circuit is operable to receive the detected output and to provide the modified version of the detected output.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. Such systems and methods may include data pre-processing and detection to identify a media defect.

Abstract: Methods and apparatus are provided for detecting a sync mark in a storage system, such as a hard disk drive. A sync mark is detected in a storage system by obtaining one or more branch metrics from a data detector in the storage system; generating one or more sync mark metrics using the one or more branch metrics from the data detector; and identifying the sync mark based on the sync mark metrics. An input data set is optionally compared with a plurality of portions of a sync mark pattern to yield corresponding comparison values and the comparison values can be summed to obtain at least one result. A sync mark found signal is asserted based upon the at least one result.

Abstract: The disclosure is directed to a system and method for accessing one or more values of a lookup table. In some embodiments, one or more read only memory devices are configured for storing a first plurality of values of the lookup table, and one or more combinational logic circuits are configured for accessing a second plurality of values of the lookup table. At least one of hardware area and timing pressures are mitigated through various storage and access schemes.

Abstract: Techniques are described for constructing maximum transition run (MTR) modulation code based upon a multi-level (ML) run-length limited (RLL) finite state machine (FSM) that implements different sets of penalties. A processor is configured to receive information from a hard disk drive (HDD) via a read channel and recover data from the HDD using MTR modulation code. A memory has computer executable instructions configured for execution by the processor to model a magnetic recording channel as a partial response channel, model a source of information to the magnetic recording channel to provide an optimized Markov source, and construct an MTR modulation code to mimic the optimized Markov source based upon an FSM having a limited transition run length and a multi-level periodic structure. The FSM provides at least two different sets of penalties in a period.

Abstract: Various embodiments of the present invention provide apparatuses, systems and methods for data detection in a detector with soft pruning. For example, a data detector is disclosed that includes a branch metric calculator operable to calculate branch metrics for transitions between states in a trellis for the data detector, and a branch metric offset circuit operable to apply branch metric offsets to the branch metrics to yield soft pruned branch metrics. The branch metric offsets comprise a range of probability values from zero percent to one hundred percent.

Abstract: Various embodiments of the present invention provide systems and methods for encoding and decoding data for constrained systems with state-split based encoders and decoders.

Abstract: In one embodiment, a read/write chip for a hard disc drive has at least one on-chip, in-channel, hardware-based optimization processor that is part of one or more channels (e.g., read, write, and/or servo) of the read/write chip. The optimization processor can iteratively evaluate the performance of a channel for different values of one or more different parameters that control channel processing by generating an appropriate metric value for each different parameter value. The optimization processor can then select an optimal parameter value for subsequent channel processing.

Abstract: Methods and apparatus are provided for detecting a sync mark in a storage system, such as a hard disk drive. A sync mark is detected in a storage system by obtaining one or more branch metrics from a data detector in the storage system; generating one or more sync mark metrics using the one or more branch metrics from the data detector; and identifying the sync mark based on the sync mark metrics. An input data set is optionally compared with a plurality of portions of a sync mark pattern to yield corresponding comparison values and the comparison values can be summed to obtain at least one result. A sync mark found signal is asserted based upon the at least one result.

Abstract: The present invention is related to systems and methods for maintaining additional processing information during extended delay processing.

Abstract: A light emitting apparatus receives an external power. A switching unit is electrically connected with a light emitting unit to form a serial circuit. A first electrical connection element is electrically connected with the external power and the light emitting unit. A second electrical connection element is electrically connected with the external power and the switching unit. A sensing unit is electrically connected with the first electrical connection element, the second electrical connection element and the switching unit. When filament currents flow between two electrical input terminals of the first electrical connection element and between two electrical input terminals of the second electrical connection element, the sensing unit controls the switching unit to turn on to enable the light emitting unit to receive the external power and start to emit light. Thus, users can avoid the risk of electric shock when installing the light emitting apparatus.

Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry comprises a detector and a decoder coupled to the detector. The detector is configured to perform fixed-point detection on a digital data signal using a first set of quantization levels determined based at least in part on a result of a floating-point detection of the digital data signal. The decoder is configured to perform fixed-point decoding on an output of the detector using a second set of quantization levels determined based at least in part on a result of a floating-point decoding of the output of the detector.

Abstract: The present invention is related to systems and methods for applying a data decode algorithm to different rotations or modifications of a decoder input as part of data processing.