Patents by Inventor Wu Chou HSU
Wu Chou HSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11997798Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.Type: GrantFiled: August 30, 2022Date of Patent: May 28, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wu Chou Hsu, Hsing Kuo Tien, Chih-Cheng Lee, Min-Yao Chen
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Publication number: 20240164569Abstract: An automated beverage preparation apparatus includes: multiple pumps for extracting multiple fluid materials stored in multiple material containers, and pushing the extracted fluid materials to move forward; a fluid output device coupled with the multiple pumps and arranged to operably dispense fluid materials to a beverage container; a user control interface arranged to operably generate a control command; a processing circuit arranged to operably generate a corresponding control signal according to the control command; and a pump control circuit arranged to operably control the multiple pumps according to the control signal. The pump control circuit conducts a layered drink making operation under control of the processing circuit to cause the fluid output device to dispense different fluid materials to the beverage container, so as to automatically form a layered drink/gradient drink having at least two color layers within the beverage container.Type: ApplicationFiled: January 19, 2023Publication date: May 23, 2024Applicant: Botrista Technology, Inc.Inventors: Yung-Hsiang CHANG, Wu-Chou KUO, Kuan-Chang PAN, Kai-Chung HSU, Jhih-Sheng JHANG
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Publication number: 20240166486Abstract: An automated beverage preparation apparatus includes: multiple pumps for extracting multiple fluid materials stored in multiple material containers, and pushing the extracted fluid materials to move forward; a fluid output device coupled with the multiple pumps and arranged to operably dispense fluid materials to a beverage container; a user control interface arranged to operably generate a control command; a processing circuit arranged to operably generate a corresponding control signal according to the control command; and a pump control circuit arranged to operably control the multiple pumps according to the control signal. The pump control circuit conducts a sparkling drink making operation under control of the processing circuit to cause the fluid output device to dispense different fluid materials to the beverage container in order, so as to automatically form a sparkling drink/aerated drink with a predetermined flavor within the beverage container.Type: ApplicationFiled: January 19, 2023Publication date: May 23, 2024Applicant: Botrista Technology, Inc.Inventors: Yung-Hsiang CHANG, Wu-Chou KUO, Kuan-Chang PAN, Kai-Chung HSU, Jhih-Sheng JHANG
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Publication number: 20240112848Abstract: A package structure is provided. The package structure includes an electronic component and a connection element. The electronic component includes a conductive wire and a magnetic layer encapsulating the conductive wire. The connection element penetrates and contacts the magnetic layer and the conductive wire.Type: ApplicationFiled: September 29, 2022Publication date: April 4, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wu Chou HSU, Hung Yi CHUANG
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Patent number: 11784111Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.Type: GrantFiled: May 28, 2021Date of Patent: October 10, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Chin-Cheng Kuo, Wu Chou Hsu
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Publication number: 20220418115Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.Type: ApplicationFiled: August 30, 2022Publication date: December 29, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wu Chou HSU, Hsing Kuo TIEN, Chih-Cheng LEE, Min-Yao CHEN
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Publication number: 20220384309Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.Type: ApplicationFiled: May 28, 2021Publication date: December 1, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Yuan KUNG, Hung-Yi LIN, Chin-Cheng KUO, Wu Chou HSU
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Publication number: 20220285282Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.Type: ApplicationFiled: May 24, 2022Publication date: September 8, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wu Chou HSU, Min-Yao CHEN
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Patent number: 11432406Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.Type: GrantFiled: September 18, 2020Date of Patent: August 30, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wu Chou Hsu, Hsing Kuo Tien, Chih-Cheng Lee, Min-Yao Chen
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Patent number: 11342272Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.Type: GrantFiled: June 11, 2020Date of Patent: May 24, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wu Chou Hsu, Min-Yao Chen
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Publication number: 20220157745Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.Type: ApplicationFiled: January 31, 2022Publication date: May 19, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
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Patent number: 11335650Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate. The electronic component includes a conductive wire comprising an alignment mark section and a connection section, and a magnetic layer partially covering the conductive wire. The magnetic layer includes an alignment window disposed in an upper surface of the magnetic layer and exposing a first upper surface of the alignment mark section, and a recess disposed in the upper surface of the magnetic layer and exposing a second upper surface of the connection section. The conductive trace is in the recess and electrically connected to the second upper surface of the connection section of the conductive wire.Type: GrantFiled: June 11, 2020Date of Patent: May 17, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wu Chou Hsu, Chih-Cheng Lee, Min-Yao Chen, Hsing Kuo Tien
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Publication number: 20220095462Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.Type: ApplicationFiled: September 18, 2020Publication date: March 24, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wu Chou HSU, Hsing Kuo TIEN, Chih-Cheng LEE, Min-Yao CHEN
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Patent number: 11239184Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.Type: GrantFiled: June 11, 2020Date of Patent: February 1, 2022Assignee: ADVANCED SEMICONDUTOR ENGINEERING, INC.Inventors: Wu Chou Hsu, Chih-Cheng Lee, Min-Yao Chen, Hsing Kuo Tien
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Publication number: 20210391283Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.Type: ApplicationFiled: June 11, 2020Publication date: December 16, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
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Publication number: 20210391284Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate. The electronic component includes a conductive wire comprising an alignment mark section and a connection section, and a magnetic layer partially covering the conductive wire. The magnetic layer includes an alignment window disposed in an upper surface of the magnetic layer and exposing a first upper surface of the alignment mark section, and a recess disposed in the upper surface of the magnetic layer and exposing a second upper surface of the connection section. The conductive trace is in the recess and electrically connected to the second upper surface of the connection section of the conductive wire.Type: ApplicationFiled: June 11, 2020Publication date: December 16, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
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Publication number: 20210391271Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.Type: ApplicationFiled: June 11, 2020Publication date: December 16, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wu Chou HSU, Min-Yao CHEN