Abstract: A pixel circuit includes a first control sub-circuit, a second control sub-circuit, a current detection sub-circuit, a driving sub-circuit, and an energy storage sub-circuit. The first control sub-circuit is configured to transmit a voltage on a data voltage terminal to a first node under control of a voltage on a first scan signal terminal. The second control sub-circuit is configured to transmit the voltage on the first node to a control terminal of the driving sub-circuit under control of a voltage on a second scan signal terminal. The current detection sub-circuit is configured to output a detection current under control of the voltage on the first node and detect a current value of the detection current. The driving sub-circuit is configured to output a driving current under control of the voltage on the control terminal of the driving sub-circuit. The energy storage sub-circuit is configured to store electrical energy.

Abstract: A shift register circuit includes a pull-up control sub-circuit, a pull-up sub-circuit and a shutdown auxiliary sub-circuit. The pull-up control sub-circuit is configured to transmit a voltage from the signal input terminal to the pull-up node under the control of the voltage from the signal input terminal. The shut-down auxiliary sub-circuit is configured to pull down a voltage of the pull-up node to a voltage of the discharge voltage terminal under the control of a voltage from the pull-up node. The pull-up sub-circuit is configured to transmit a voltage from the clock signal terminal to the first signal output terminal under the control of a voltage from the pull-up node. The first signal output terminal is configured to be connected to a gate line.

Abstract: The embodiments of the present application provide a shift register, a method for controlling the same, a gate driving circuit, and a display apparatus. The shift register includes: an input circuit coupled to a signal input terminal and a pull-up node; a pull-up circuit coupled to the pull-up node, a first clock signal terminal and a signal output terminal; a pull-down circuit coupled to a reset signal terminal, a first voltage signal terminal, the pull-up node, and the signal output terminal; a pull-down control circuit coupled to a second clock signal terminal, the pull-up node, a pull-down node, and the first voltage signal terminal; a first de-noising circuit coupled to the pull-up node, the signal input terminal, the first voltage signal terminal, and a compensation node; and a compensation circuit coupled to the first clock signal terminal, the second clock signal terminal, and the compensation node.

Abstract: The present disclosure relates to a pixel driving circuit and a driving method for the same and a display panel. The pixel driving circuit includes a driver unit, a circuit switching unit, and a storage capacitor unit. The driver unit includes a first sub-driver unit and a second sub-driver unit. The circuit switching unit has a first switching unit and a second switching unit. Two terminals of the first switching unit are electrically connected to a first terminal of the light emitting unit and the first sub-driver unit, respectively, two terminals of the second switching unit are electrically connected to the light emitting unit and the second sub-driver unit, respectively, and the circuit switching unit is configured to switch conductive states of the first switching unit and the second switching unit.

Abstract: The invention discloses a pixel driving circuit, a driving method, an organic light emitting display panel and a display device. The pixel driving circuit comprises a data writing module (1), a memory module (2), at least one first light emitting device (D1), a first driving module (3) which corresponds to the various first light emitting devices (D1) one by one, at least one second light emitting device (D2) and a second driving module (4) which corresponds to the various second light emitting devices (D2) one by one. Through mutual cooperation of each module, the voltage of a node can be switched between a positive value and a negative value by virtue of a simple structure, so that performances of the first driving module (3) and the second driving module (4) are recovered, and then the influence on the stability and the service life of the display panel due to performance offset of the first driving module (3) and the second driving module (4) is relieved.

Abstract: A shift register, an array substrate and a display device in the field of display technology are provided in the present disclosure. In the shift register, the gate electrode of the first transistor is connected to a second node, one of the source electrode and the drain electrode is connected to a first clock signal line, and the other one is connected to the first node. The gate electrode of the second transistor is connected to the second node, one of the source electrode and the drain electrode is connected to the second node, and the other one is connected to the first clock signal line. The charging circuitry is configured to set the second node to an effective level when a second clock signal line is at an effective level.

Abstract: Provided are a shift register and a driving method thereof, a gate on array circuit and a display apparatus. The shift register includes a pre-charging module, an output module, a reset module and a reset control module. The pre-charging module is configured to charge a first node in a pre-charging period. The output module is configured to pull up a voltage at the first node and output a driving signal through the output signal terminal in an output period. The reset control module is configured to pull up a voltage at the second node by the driving signal outputted through the output signal terminal in the output period and output the voltage at the second node pulled up in the output period to the reset module as a reset signal in a reset period.