Abstract: The present disclosure provides a method for recycling urea-formaldehyde (UF) from a wood-based panel. In the present disclosure, the UF is depolymerized by an ultrasonic treatment, and depolymerized UF can be reused for UF manufacture and wood-based panel production. The recycled and treated UF can be repeatedly used in wood-based panel manufacture without affecting performances of the wood-based panel. UF-glued wood-based panels can be recycled, and a recycled wood-based panel raw material can replace at least 50% of a non-recycled wood-based raw material for particle board production without affecting performances of the wood-based panel.

Abstract: According to one aspect, a system for resource management may perform receiving a total resource request, a vector of two or more maximum available resources associated with two or more corresponding resource providers, and a number of resource providers and calculating an individual resource request for each of the two or more resource providers by iteratively comparing the vector of two or more maximum available resources with a vector of a current average resource residual, taking a minimum between those vectors as a running tally for the individual resource requests, and recalculating the current average resource residual.

Abstract: This invention relates generally to cyanine-containing compounds; pharmaceutical compositions comprising cyanine-containing compounds; and methods of using cyanine-containing compounds for cancer cell imaging, cancer cell growth inhibition, and detecting cancer cells, for example. Compounds of the invention are preferentially taken up by cancer cells as compared to normal cells. This allows many uses in the cancer treatment, diagnosis, tracking and imaging fields.

Abstract: The present invention describes small molecule ligand-drug conjugates and methods of using the small molecule ligand-drug conjugates for targeted treatment of cancer in a patient in need thereof. Further described are methods of sterilizing circulating tumor cells and determining drug concentration in cancer tissue.

Abstract: A method of FPGA compilation for an emulation system includes receiving a netlist for an FPGA, partitioning the netlist into a set of sub-FPGA netlists, and mapping each of the sub-FPGA netlists in the set to a corresponding dynamic sub-FPGA region of the FPGA. The method further includes implementing the sub-FPGA netlists of the set in parallel to obtain a corresponding set of sub-FPGA bitstreams.

Abstract: The present disclosure provides a chip transfer substrate, a chip transfer device and a chip transfer method. The chip transfer substrate includes a substrate, a plurality of bases spaced apart from each other on the substrate, the plurality of bases being configured to carry micro light emitting diodes (Micro LEDs) to be transferred and being movable on the substrate; and a plurality of distance adjusting components each arranged between two adjacent bases and configured to adjust a distance between the two adjacent bases.

Abstract: A connector has a housing configured to mate with a second housing, a pair of slide members movably mounted on the housing, and a lever pivotably attached to the housing and slidably coupled to the slide members. Each slide member has a cam groove in a side surface which provides an angled lead-in surface into the cam groove and cam surfaces engageable with a cam follower post of the second housing. A blocking shoulder partially blocking an opening of the cam groove to prevent entry of the cam follower post unless the cam follower post is in a correct position. When the cam follower post engages the angled lead-in surface, this provides a visual and tactile indication to a user that the connector is ready to be mated with the second housing.

Abstract: A plastic frame includes a first frame having a first frame surface and a first end portion and a second end portion opposite to each other, and a second frame having a second frame surface, an end portion of the second frame being connected to the first end portion of the first frame. The first frame surface and the second frame surface are located on the same side of the plastic frame. A first height difference between the first frame surface at a first end portion of the first frame and the second frame surface is smaller than a height difference between the first frame surface at a middle portion of the first frame and the second frame surface. The first height difference may be, for example, 0.1-0.3 mm.

Abstract: A plastic frame includes a first frame having a first frame surface and a first end portion and a second end portion opposite to each other, and a second frame having a second frame surface, an end portion of the second frame being connected to the first end portion of the first frame. The first frame surface and the second frame surface are located on the same side of the plastic frame. A first height difference between the first frame surface at a first end portion of the first frame and the second frame surface is smaller than a height difference between the first frame surface at a middle portion of the first frame and the second frame surface. The first height difference may be, for example, 0.1-0.3 mm.

Abstract: Methods and apparatus are described for providing and using programmable ICs suitable for meeting the unique desires of large hardware emulation systems. One example method of classifying a programmable IC having impaired circuitry generally includes determining a partitioning of programmable logic resources into two or more groups for classifying the programmable IC, testing the programmable IC to determine at least one location of the impaired circuitry in the programmable logic resources of the programmable IC, and classifying the programmable IC based on the at least one location of the impaired circuitry in relation to the partitioning of the programmable logic resources.

Abstract: The present disclosure provides a chip transfer substrate, a chip transfer device and a chip transfer method. The chip transfer substrate includes a substrate, a plurality of bases spaced apart from each other on the substrate, the plurality of bases being configured to carry micro light emitting diodes (Micro LEDs) to be transferred and being movable on the substrate; and a plurality of distance adjusting components each arranged between two adjacent bases and configured to adjust a distance between the two adjacent bases.

Abstract: A connector has a housing configured to mate with a second housing, a pair of slide members movably mounted on the housing, and a lever pivotably attached to the housing and slidably coupled to the slide members. Each slide member has a cam groove in a side surface which provides an angled lead-in surface into the cam groove and cam surfaces engageable with a cam follower post of the second housing. A blocking shoulder partially blocking an opening of the cam groove to prevent entry of the cam follower post unless the cam follower post is in a correct position. When the cam follower post engages the angled lead-in surface, this provides a visual and tactile indication to a user that the connector is ready to be mated with the second housing.

Abstract: The disclosed approaches involve evaluating by a design tool executing on a computer system, a plurality of nets of a circuit design for individual levels of suitability for cutting each net into a cut net that crosses a partition boundary between a plurality of partitions of an integrated circuit (IC) device. The design tool partitions the circuit design. The partitioning includes cutting one or more of the nets into cut nets and favoring the cutting of ones of the plurality of nets having a greater level of suitability over others of the plurality of nets having a lesser level of suitability. The design tool assigns each cut net to one group of a plurality of groups and inserts respective time-division multiplexing circuitry on each group of cut nets. The design toon then places the circuit design on the IC device.

Abstract: Some examples described herein provide for clock tree generation for a programmable logic device, and more specifically, for clock tree generation in conjunction or simultaneous with placement of logic for a programmable logic device. In an example, a design system includes a processor and a memory coupled to the processor. The memory stores instruction code. The processor is configured to execute the instruction code to: generate clock trees in conjunction with placing logic for an application to be implemented in a programmable logic region of a programmable logic device; generate data routes between the placed logic; and generate a physical implementation of the application based on the placed logic, the clock trees, and the data routes. The physical implementation is capable of being loaded on the programmable logic region of the programmable logic device.

Abstract: The present disclosure provides a flexible display device. The flexible display device comprises: a flexible base substrate, an electrodeformation layer set on the flexible base substrate, and a display layer set on the electrodeformation layer; wherein, the electrodeformation layer is configured to, when power is supplied, generate deformation, further cause the flexible base substrate and the display layer to generate corresponding deformation, cause the flexible display device to achieve flexible display, and when power is cut off, return to an original shape.

Abstract: A virtual imaging display device includes a base board; a panel configured to be rotatably provided at one of sides of the base board; a lens mounting board configured to be rotatably provided at a side of the panel facing the base board; a projecting lens configured to be mounted on the lens mounting board; and a plurality of half-transmitting mirrors configured to be rotatably provided at remaining sides of the base board, respectively. The virtual imaging display device has a deployed state in which the lens mounting board and the half-transmitting mirrors are configured to abut on each other to define together a frustum structure, and a collapsed state in which the half-transmitting mirrors each are configured to rest on the base board, the lens mounting board is configured to rest on the panel, and the panel is configured to rest on the base board.

Abstract: The present disclosure provides a flexible display device. The flexible display device comprises: a flexible base substrate, an electrodeformation layer set on the flexible base substrate, and a display layer set on the electrodeformation layer; wherein, the electrodeformation layer is configured to, when power is supplied, generate deformation, further cause the flexible base substrate and the display layer to generate corresponding deformation, cause the flexible display device to achieve flexible display, and when power is cut off, return to an original shape.

Abstract: This application relates to a flexible display screen, comprising: a silicone substrate; a first electrode of polyacrylamide-lithium chloride hydrogel above the silicone substrate; a zinc sulfide-silicone light-emitting layer above the first electrode of polyacrylamide-lithium chloride hydrogel; and a second electrode of polyacrylamide-lithium chloride hydrogel above the zinc sulfide-silicone light-emitting layer.

Abstract: A flexible printed circuit, a method for fabricating the same, and a display device are provided. The circuit includes: a substrate, at least one conductive structure located on the substrate, a contact electrode group, an encapsulation layer configured to encapsulate the conductive structure and the contact electrode group, and a ventilating film. The contact electrode group includes a first and a second contact electrodes, configured to be electrically connected respectively with two ends of the conductive structure; the encapsulation layer and the substrate constitute a cavity and a liquid storage area communicating with each other; the conductive structure includes a liquid conductive substance located in the cavity; and the liquid storage area is configured to store the liquid conductive substance, and the ventilating film is configured to encapsulate the liquid storage area.

Abstract: Embodiments disclosed herein describe techniques for moving nets between a source and a plurality of sinks in a design of an integrated circuit from a data network to a clock network. In one embodiment, the clock network propagates clock signals or timing signals throughout the integrated circuit while the data network transmits data signals between circuitry in the integrated circuit. In one embodiment, the clock network has a predefined number of clock signal nets which can be assigned to carry clock signals to circuit logic in the integrated circuit. However, some of the clock signal nets may be unused. In one embodiment, a design application identifies candidate sinks which have positive slack. If using the clock network to couple the sink to the source satisfies predetermined timing requirements, then the design change is committed.