Abstract: A light source, a light source assembly, a display device and a display method. The light source comprises a first light emitting region and a second light emitting region. The first light emitting region and the second light emitting region can control ON or OFF of the light emission separately. The first light emitting region and the second light emitting region are arranged alternately along a first direction. The first light emitting region and the second light emitting region of the light sources in this disclosure can be controlled separately. Hence, one light emitting region can be made to emit light while the other light emitting region can be made to be turned off. There is no stray light in the turned-off light emitting region, so as to avoid stray light crosstalk to light of the other light emitting region.

Abstract: A light source panel and a display device are disclosed. The display device includes: a display panel of reflection type and a light source panel disposed on a light emitting side of the display panel, the light source panel includes a parallax barrier structure and light emitting units, the parallax barrier structure includes light splitting components, the light splitting components include at least a non-transparent state, the light transmission areas are located in spaces between adjacent splitting light components, and the light emitting units at least partially overlap with the light splitting components in a direction perpendicular to the light source panel.

Abstract: The embodiments of the present disclosure provide a 3D display device and a manufacturing method thereof. The 3D display device includes a first substrate; a second substrate disposed opposite to the first substrate; a black matrix; and a grating. The black matrix and the grating are disposed on a side of the first substrate facing away from the second substrate; the black matrix and the grating are disposed in a same layer; and a side of the first substrate where the black matrix and the grating are located is a light exit side of the 3D display device.

Abstract: An integrated display panel and a preparation method thereof are provided. The integrated display panel includes a first base substrate and a second base substrate, the first base substrate and the second base substrate being disposed opposite to each other, the first base substrate being provided with a pixel unit thereon, the pixel unit including a plurality of sub-pixel units having different colors; the integrated display panel further includes an image acquisition module which includes a photo sensing unit disposed in each of the sub-pixel units, the photo sensing unit includes a photodiode disposed in a non-display region of the sub-pixel unit, the photodiode is configured to photoelectrically convert light from a target area to obtain an electric signal representing an image of the target area.

Abstract: An integrated display panel, a display apparatus and an image display method. The integrated display panel includes a display substrate and a plurality of photodiodes located in the display substrate, at least part of the plurality of photodiodes being configured to acquire light signals of a target area and convert the acquired light signals of the target area into electric signals for forming a target area image.

Abstract: A light emitting diode display substrate, a manufacturing method thereof, and a display device arc provided. The light emitting diode display substrate includes a base substrate; a light emitting diode located on the base substrate, and a self-assembled monolayer. The light emitting diode includes a graphene layer, and the graphene layer is located on a side of the light emitting diode close to the base substrate; the self-assembled monolayer is located between the graphene layer and the base substrate and connected with the graphene layer.

Abstract: The disclosure relates to an array substrate, a display panel, a display device, and a method for manufacturing the array substrate. The array substrate includes a first substrate, a light emitting device on the first substrate, the light emitting device including a first electrode, a light emitting layer, and a second electrode sequentially disposed in a direction away from the first substrate, wherein the first electrode is transparent, and wherein the second electrode is reflective, an opaque portion between the first substrate and the light emitting device, wherein a projection of the light emitting device on the first substrate partially overlap with a projection of the opaque portion on the first substrate, and a reflective member between the opaque portion and the light emitting layer.

Abstract: The disclosure provides a display panel, a method for fabricating the same, and a display device. The display panel includes a plurality of pixel elements distributed in an array, each of which includes a plurality of sub-pixel elements, wherein there is a photon crystal film layer arranged on a light exit side of the pixel elements in the display panel, and the photon crystal film layer includes photon crystal areas corresponding to the respective sub-pixel elements in a one-to-one manner; and there are a plurality of micro-holes structures arranged uniformly in each photon crystal area, and apertures of the micro-hole structures in the respective photon crystal areas match colors of light to be displayed at the sub-pixel elements corresponding to the photon crystal areas.

Abstract: The present disclosure discloses a display device and a manufacturing method thereof. The display device includes a middle frame and an indiscrete flexible display panel bending around the middle frame. The flexible display panel includes a main display panel region on one side of the middle frame, an auxiliary display panel region on another side of the middle frame, and a bending region bending around the middle frame to connect the main display panel region with the auxiliary display panel region.

Abstract: A wireless charging assembly includes a substrate and a charging emission trace on the substrate. The wireless charging assembly further includes a touch structure on a side, which is away from the charging emission trace, of the substrate. A preparation method of the wireless charging assembly, a terminal device and a wireless charging method for the terminal device are also provided.

Abstract: An apparatus includes a memory and a processor coupled to the memory. The processor includes first and second sets of arithmetic units having first and second precision for floating-point computations, the second precision being lower than the first precision. The processor is configured to obtain a machine learning model trained in the first precision, to utilize the second set of arithmetic units to perform inference on input data, to utilize the first set of arithmetic units to generate feedback for updating parameters of the second set of arithmetic units based on the inference performed on the input data by the second set of arithmetic units, to tune parameters of the second set of arithmetic units based at least in part on the feedback generated by the first set of arithmetic units, and to utilize the second set of arithmetic units with the tuned parameters to generate inference results.

Abstract: An apparatus includes circuitry for a neural network that is configured to perform forward propagation neural network operations on floating point numbers having a first n-bit floating point format. The first n-bit floating point format has a configuration consisting of a sign bit, m exponent bits and p mantissa bits where m is greater than p. The circuitry is further configured to perform backward propagation neural network operations on floating point numbers having a second n-bit floating point format that is different than the first n-bit floating point format. The second n-bit floating point format has a configuration consisting of a sign bit, q exponent bits and r mantissa bits where q is greater than m and r is less than p.

Abstract: An apparatus for training and inferencing a neural network includes circuitry that is configured to generate a first weight having a first format including a first number of bits based at least in part on a second weight having a second format including a second number of bits and a residual having a third format including a third number of bits. The second number of bits and the third number of bits are each less than the first number of bits. The circuitry is further configured to update the second weight based at least in part on the first weight and to update the residual based at least in part on the updated second weight and the first weight. The circuitry is further configured to update the first weight based at least in part on the updated second weight and the updated residual.

Abstract: The present application discloses a display panel including a base substrate; a first micro LED array having a plurality of first micro LED pixels in a matrix along a first direction and a second direction on the base substrate; and a second micro LED array having a plurality of second micro LED pixels on a side of the first micro LED array distal to the base substrate, the plurality of second micro LED pixels being grouped into a plurality of groups of second micro LED pixels successively along the second direction, each of the plurality of groups of second micro LED pixels substantially along the first direction and comprising one or more rows of second micro LED pixels substantially along the first direction. Adjacent groups of the plurality of groups of second micro LED pixels are spaced apart from each other thereby exposing a portion of the first micro LED array.

Abstract: The present disclosure discloses a display device and a manufacturing method thereof. The display device includes a middle frame and an indiscrete flexible display panel bending around the middle frame. The flexible display panel includes a main display panel region on one side of the middle frame, an auxiliary display panel region on another side of the middle frame, and a bending region bending around the middle frame to connect the main display panel region with the auxiliary display panel region.

Abstract: A display assembly includes a display panel and at least one optical film group each disposed on a display surface. Each optical film group includes a quarter-wave plate, a reflective polarizer and an absorbing polarizer. The reflective polarizer includes a reflective portion capable of allowing light with a polarization direction parallel to a polarization axis of the reflective polarizer to pass through and reflecting light with a polarization direction perpendicular to the polarization axis. An orthographic projection of an effective light-emitting area of at least one sub-pixel is substantially within an orthographic projection of the reflective portion. The absorbing polarizer is capable of allowing light with a polarization direction parallel to a polarization axis of the absorbing polarizer to pass through and absorbing light with a polarization direction perpendicular to the polarization axis.

Abstract: The embodiments of the present disclosure disclose an OLED array substrate. The OLED array substrate comprises: a plurality of scan lines; a plurality of data lines; a plurality of OLED pixel units, each OLED pixel unit is connected to a corresponding data line and a corresponding scan line and being connected to a corresponding reset terminal; and a plurality of light detection units, each light detection unit is connected between the reset terminal of one OLED pixel unit and the corresponding data line, is configured to detect a light emitted by a detection light resource to generate a light detection signal, and output the light detection signal via the corresponding data line under a control of a reset signal from the reset terminal.

Abstract: A computer-implemented method for performing an exponential calculation using only two fully-pipelined instructions in a floating point unit that includes. The method includes computing an intermediate value y? by multiplying an input operand with a predetermined constant value. The input operand is received in floating point representation. The method further includes computing an exponential result for the input operand by executing a fused instruction. The fused instructions includes converting the intermediate value y? to an integer representation z represented by v most significant bits (MSB), and w least significant bits (LSB). The fused instruction further includes determining exponent bits of the exponential result based on the v MSB from the integer representation z. The method further includes determining mantissa bits of the exponential result according to a piece-wise linear mapping function using a predetermined number of segments based on the w LSB from the integer representation z.

Abstract: A method, system, program control code, and hardware circuit are provided for predicting performance of an system-on-chip (SoC) (100) having a processor (105) and a master device (106) having shared access to a single-port memory (104) by activating a timer (102) in a Performance Monitoring Unit (PMU) (101) to measure a specified number of cycles of the processor in a defined measure instance and by activating a memory access counter (103) in the PMU to measure a first count of memory access requests to the single-port memory by the processor in the defined measure instance and to measure a second count of memory access requests to the single-port memory by the master device in the defined measure instance, so that the first and second counts are stored in memory.

Abstract: A synapse network device includes an array of field effect transistor (FET) devices having controllable channel resistance. Pre-neurons are coupled to the array to provide input pulses to the array on first terminals of the FET devices. Post-neurons are coupled to the array to receive outputs from the array on second terminals of the FET devices and provide feedback to the array on third terminals of the FET devices, wherein a state of the FET devices is indicated based upon signals applied to the FET devices.