Patents by Inventor Xiaofen Zheng

Xiaofen Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240172437
    Abstract: A method includes forming a stack of alternating insulating layers and sacrificial layers over a substrate; forming a trench through the stack to uncover the substrate to expose lateral sides of the insulating layers and the sacrificial layers, the trench extending from a core area to a stair step area of the stack; forming a liner to cover the exposed lateral sides; removing the liner in the trenches within a first area of the core area and the stair step area to expose the lateral sides of the sacrificial layers of the stack within the first area; removing the sacrificial layers within the first area; removing the liner in the trenches within a second area of the core area and the stair step area to expose the lateral sides of the sacrificial layers of the stack within the second area; and removing the sacrificial layers within the second area.
    Type: Application
    Filed: December 19, 2022
    Publication date: May 23, 2024
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Zhen GUO, Wei XU, ZhiPeng WU, XiaoFen ZHENG, Yuan YUAN, Lei LI, Lei XUE, ZongLiang HUO
  • Publication number: 20230018927
    Abstract: A method for manufacturing a three-dimensional storage includes: providing a substrate; forming a first connecting layer and a first sacrificial layer; etching part of the first sacrificial layer to form first grooves and second grooves; forming first connecting structures in the first grooves and second connecting structures in the second grooves; forming a second connecting layer on the first sacrificial layer, the second connecting layer filling up the first and second grooves; forming a stacked structure on a surface of the second connecting layer; forming a channel structure and a gate line slit penetrating the stacked structure and extending to the first sacrificial layer; removing the first sacrificial layer and a part of the channel structure corresponding to the first sacrificial layer by the gate line slit to form an opening region; and forming an epitaxial structure layer in the opening region through the gate line slit.
    Type: Application
    Filed: September 26, 2022
    Publication date: January 19, 2023
    Inventors: Erwei Wang, Xiaofen Zheng, Lixun Gu
  • Patent number: 11538825
    Abstract: Methods for forming channel structures in 3D memory devices are disclosed. In one example, a memory film and a sacrificial layer are subsequently formed along a sidewall and a bottom of a channel hole. A protective structure covering a portion of the sacrificial layer along the sidewall of the channel hole is formed. A portion of the sacrificial layer at the bottom of the channel hole that is not covered by the protective structure is selectively removed. A portion of the memory film at the bottom of the channel hole that is not covered by a remainder of the sacrificial layer is selectively removed.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: December 27, 2022
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Xiaofen Zheng, Hongbin Zhu, Lixun Gu, Hanwei Yi
  • Publication number: 20210335813
    Abstract: Methods for forming channel structures in 3D memory devices are disclosed. In one example, a memory film and a sacrificial layer are subsequently formed along a sidewall and a bottom of a channel hole. A protective structure covering a portion of the sacrificial layer along the sidewall of the channel hole is formed. A portion of the sacrificial layer at the bottom of the channel hole that is not covered by the protective structure is wet etched. A portion of the memory film at the bottom of the channel hole that is not covered by a remainder of the sacrificial layer is wet etched.
    Type: Application
    Filed: July 1, 2021
    Publication date: October 28, 2021
    Inventors: Xiaofen Zheng, Hongbin Zhu, Lixun Gu, Hanwei Yi
  • Publication number: 20210257381
    Abstract: Methods for forming channel structures in 3D memory devices are disclosed. In one example, a memory film and a sacrificial layer are subsequently formed along a sidewall and a bottom of a channel hole. A protective structure covering a portion of the sacrificial layer along the sidewall of the channel hole is formed. A portion of the sacrificial layer at the bottom of the channel hole that is not covered by the protective structure is selectively removed. A portion of the memory film at the bottom of the channel hole that is not covered by a remainder of the sacrificial layer is selectively removed.
    Type: Application
    Filed: April 28, 2020
    Publication date: August 19, 2021
    Inventors: Xiaofen Zheng, Hongbin Zhu, Lixun Gu, Hanwei Yi
  • Patent number: D885071
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: May 26, 2020
    Inventor: Xiaofen Zheng