Patents by Inventor Xiaofeng Guo

Xiaofeng Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8958063
    Abstract: An illumination device for providing near isotropic illumination, and particularly an illumination system for detecting the defect in a transparent substrate and a detection system including the same are presented. An illumination system includes: an illumination system for detecting the defect in a transparent substrate, including light source receptacle in bar shape; first spot light sources, each emitting a respective first light, the respective first lights being substantially parallel to each other and the first spot light sources being arranged to a first line of spot light sources along the longitudinal direction of the receptacle; and second spot light sources, each emitting a respective second light, the respective second lights being substantially parallel to each other and the second spot light sources being arranged to a second line of spot light sources along the longitudinal direction of the receptacle.
    Type: Grant
    Filed: December 31, 2011
    Date of Patent: February 17, 2015
    Assignee: Saint-Gobain Glass France
    Inventors: Xiaofeng Guo, Huifen Li, Xiaofeng Lin, Xiaowei Sun, Wenhua Deng
  • Publication number: 20140347657
    Abstract: An illumination device for providing near isotropic illumination, and particularly an illumination system for detecting the defect in a transparent substrate and a detection system including the same are presented, An illumination system includes: an illumination system for detecting the defect in a transparent substrate, including light source receptacle in bar shape; first spot light sources, each emitting a respective first light, the respective first lights being substantially parallel to each other and the first spot light sources being arranged to a first line of spot light sources along the longitudinal direction of the receptacle; and second spot light sources, each emitting a respective second light, the respective second lights being substantially parallel to each other and the second spot light sources being arranged to a second line of spot light sources along the longitudinal direction of the receptacle.
    Type: Application
    Filed: December 31, 2011
    Publication date: November 27, 2014
    Applicant: SAINT-GOBAIN GLASS FRANCE
    Inventors: Xiaofeng Guo, Huifen Li, Xiaofeng Lin, Xiaowei Sun, Wenhua Deng
  • Publication number: 20140258222
    Abstract: A user-level file system interfacing with at least one user application for a transparent view with a file system module implemented in a kernel subsystem and a user storage client module implemented in a user-level file system to access and synchronize at least a resource stored within a storage media device, and translating a request, from the user application, to access the resource to the user-level file system for the transparent view. The user-level storage client module receives the request to access the resource from the user application for the transparent view. A storage prediction service retrieves the request to access the resource from the user-level storage client module for the transparent view. The network storage service receives the request to access the resource from the user-level storage client module. The user application is provided with access to the transparent view of requested resource stored within the storage media device.
    Type: Application
    Filed: March 5, 2013
    Publication date: September 11, 2014
    Inventors: Xiaofeng Guo, Yingxuan Kang
  • Patent number: 8769513
    Abstract: An embodiment of the present invention is a technique to hide latency in program traces. Blocks of instructions between start and end of a critical section are associated with color information. The blocks correspond to a program trace and containing a wait instruction. The wait instruction is sunk down the blocks globally to the end of the critical section using the color information and a dependence constraint on the wait instruction.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: July 1, 2014
    Assignee: Intel Corporation
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li, Zhiyuan Lv
  • Patent number: 8745606
    Abstract: Critical sections in a programming code may be ordered based at least in part on code motions. A flow graph of the code including the critical section may be generated. Two initiative motions may be performed based on the flow graph to identify possible positions of critical codes in the flow graph. Dependence relationship of critical sections may be determined based on the positions of critical sections. Using the dependence relationship information, the order of critical sections may be determined. The determined order of critical sections may be further used by a compiler to perform optimizations for the code.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: June 3, 2014
    Assignee: Intel Corporation
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li
  • Publication number: 20140129720
    Abstract: Various embodiments provide methods, apparatus, and systems for allocating content delivery network (CDN) volume. In an exemplary method, a business visit request can be received. Based on at least one of a time allocation strategy, a request number allocation strategy, and a regional allocation strategy, the business visit request can be dispatched to CDN servers for handling the business visit request.
    Type: Application
    Filed: January 13, 2014
    Publication date: May 8, 2014
    Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: XIAOFENG GUO, XIANNENG ZOU, XIANFENG MO
  • Patent number: 8612957
    Abstract: A computer implemented method for scheduling multithreaded programming instructions based on the dependency graph wherein the dependency graph organizes the programming instruction logically based on blocks, nodes, and super blocks and wherein the programming instructions could be executed outside of a critical section may be executed outside of the critical section by inserting dependency relationship in the dependency graph.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: December 17, 2013
    Assignee: Intel Corporation
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li
  • Patent number: 8453131
    Abstract: A method of compiling code includes ordering instructions that protect and release critical sections in the code to improve parallel execution of the code according to an intrinsic order of the critical sections. According to one embodiment, the intrinsic order of the critical sections in the code is determined from data dependence and control dependence of instructions in the critical sections, and additional dependencies are generated to enforce the intrinsic order of the critical sections. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 24, 2005
    Date of Patent: May 28, 2013
    Assignee: Intel Corporation
    Inventors: Long Li, Jinquan Dai, Xiaofeng Guo
  • Publication number: 20120239492
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, are provided for computing performance estimates. Performance estimates are provided for resources based on candidate targeting criteria included in requests for the performance estimates. The performance estimates are computed based on previously received resource requests that are included in a relevant request group. The relevant request group is defined to include resource requests that include request criteria that match reference targeting criteria. The request criteria can include data characterizing a user for which the resource is being selected. In some implementations, request groups can be defined by analyzing previously-received resource requests and including the resource requests in request groups having reference targeting criteria that are matched by the request criteria.
    Type: Application
    Filed: November 19, 2009
    Publication date: September 20, 2012
    Applicant: Google Inc.
    Inventors: Xiaofeng Guo, Tong Liu
  • Publication number: 20120133762
    Abstract: A method and system for detecting and classifying a defect of a substrate, the system including a first channel, including a first illuminating unit to irradiate a light to a substrate and a first imaging unit to take images by sensing a light from the substrate when it is irradiated; a second channel, including a second illuminating unit to irradiate a light to the substrate and a second imaging unit to take images by sensing a light from the substrate when it is irradiated; an image constructing module to construct two images of the substrate using the images of the first and second imaging units respectively; and an image processing module to detect, when the substrate has a defect, that the defect is a defect on or in the substrate, based on a relationship of positions where the defect of the substrate appears in the two images of the substrate.
    Type: Application
    Filed: February 26, 2010
    Publication date: May 31, 2012
    Applicant: SAINT-GOBAIN GLASS FRANCE
    Inventors: Jean-Philippe Schweitzer, Huifen Li, Xiaofeng Lin, Xiaofeng Guo, Feng Guo, Xiaowei Sun
  • Publication number: 20110310244
    Abstract: A system and a method for detecting defects of a substrate are provided. The system includes: a first illuminating component, disposed at one side of the substrate and adapted to emit diffused light to the substrate; a first imaging component, disposed at the other side of the substrate and adapted to scan the substrate by sensing light emitted by the first illuminating component and transmitted through the substrate, the first illuminating component and the first imaging component constructing a first detection channel; and a transport module, adapted to produce relative motion between the substrate, and the first illuminating component and the first imaging component.
    Type: Application
    Filed: February 26, 2010
    Publication date: December 22, 2011
    Applicant: SAINT-GOBAIN GLASS FRANCE
    Inventors: Jean-Philippe Schweitzer, Huifen Li, Xiaofeng Lin, Feng Guo, Xiaofeng Guo
  • Patent number: 8037466
    Abstract: Critical sections used for multiple threads in a parallel program to access shared resource may be selected to merge with each other to reduce the number of signals/tokens used to create critical sections. Critical section merge may be based on a summarized dependence graph which is obtained from an instruction level dependence graph constructed based on a result of critical section minimization.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: October 11, 2011
    Assignee: Intel Corporation
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li
  • Patent number: 7890943
    Abstract: Instructions that have no dependence constraint between them and other instructions in a loop of a critical section may be moved out of the critical section so that the size of the critical section may be reduced. A flow graph of a program including the critical section may be generated, which includes loops. The flow graph may be transformed based on which any unnecessary instructions in loops may be moved out of the critical section. Subsequently, the original flow graph of the critical section may be recovered from the transformed flow graph.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: February 15, 2011
    Assignee: Intel Corporation
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li
  • Publication number: 20090265530
    Abstract: An embodiment of the present invention is a technique to hide latency in program traces. Blocks of instructions between start and end of a critical section are associated with color information. The blocks correspond to a program trace and containing a wait instruction. The wait instruction is sunk down the blocks globally to the end of the critical section using the color information and a dependence constraint on the wait instruction.
    Type: Application
    Filed: November 18, 2005
    Publication date: October 22, 2009
    Inventors: Xiaofeng Guo, Jinqua Dai, Long Li, Zhiyuan Lv
  • Publication number: 20090089765
    Abstract: Critical sections in a programming code may be ordered based at least in part on code motions. A flow graph of the code including the critical section may be generated. Two initiative motions may be performed based on the flow graph to identify possible positions of critical codes in the flow graph. Dependence relationship of critical sections may be determined based on the positions of critical sections. Using the dependence relationship information, the order of critical sections may be determined. The determined order of critical sections may be further used by a compiler to perform optimizations for the code.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li
  • Publication number: 20090049433
    Abstract: A method of compiling code includes ordering instructions that protect and release critical sections in the code to improve parallel execution of the code according to an intrinsic order of the critical sections. According to one embodiment, the intrinsic order of the critical sections in the code is determined from data dependence and control dependence of instructions in the critical sections, and additional dependencies are generated to enforce the intrinsic order of the critical sections. Other embodiments are described and claimed.
    Type: Application
    Filed: December 24, 2005
    Publication date: February 19, 2009
    Inventors: Long Li, Jinquan Dai, Xiaofeng Guo
  • Publication number: 20090043991
    Abstract: A computer implemented method for scheduling multithreaded programming instructions based on the dependency graph wherein the dependency graph organizes the programming instruction logically based on blocks, nodes, and super blocks and wherein the programming instructions could be executed outside of a critical section may be executed outside of the critical section by inserting dependency relationship in the dependency graph.
    Type: Application
    Filed: January 26, 2006
    Publication date: February 12, 2009
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li
  • Publication number: 20080244512
    Abstract: Instructions that have no dependence constraint between them and other instructions in a loop of a critical section may be moved out of the critical section so that the size of the critical section may be reduced. A flow graph of a program including the critical section may be generated, which includes loops. The flow graph may be transformed based on which any unnecessary instructions in loops may be moved out of the critical section. Subsequently, the original flow graph of the critical section may be recovered from the transformed flow graph.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li
  • Publication number: 20080163181
    Abstract: Critical sections used for multiple threads in a parallel program to access shared resource may be selected to merge with each other to reduce the number of signals/tokens used to create critical sections. Critical section merge may be based on a summarized dependence graph which is obtained from an instruction level dependence graph constructed based on a result of critical section minimization.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li
  • Publication number: 20080040711
    Abstract: Methods and apparatus to optimize computer instructions are disclosed. An example method includes receiving a set of computer instructions, determining a first location of a first computer instruction that indicates the end of a critical section in the set of computer instructions, and modifying the execution order of the set of computer instructions to cause the first computer instruction to be executed earlier than the first location. In an example implementation, the disclosed methods and apparatus may be used to optimize the performance of computer instructions executing on multi-processing computer systems.
    Type: Application
    Filed: October 2, 2006
    Publication date: February 14, 2008
    Inventors: Xiaofeng Guo, Jinquan Dai, Long Li