Abstract: A high-electron-mobility transistor structure as well as a fabricating method and use thereof are provided. The high-electron-mobility transistor structure includes an epitaxial structure as well as a source electrode, a drain electrode and a gate electrode, where the epitaxial structure includes a first semiconductor layer and a second semiconductor layer, a carrier channel is formed between the first semiconductor layer and the second semiconductor layer, and the source electrode is electrically connected with the drain electrode through the carrier channel; a coincidence rate between the orthographic projection of the gate foot of the gate electrode on the first semiconductor layer and the orthographic projection of the second semiconductor layer on the first semiconductor layer is more than 80%.

Abstract: The present application discloses a semiconductor device and a manufacturing method thereof. The manufacturing method comprises manufacturing a semiconductor material layer comprising two laminated semiconductor layers between which an etching transition layer is provided; and etching a part of one of semiconductor layers located in a selected region until etching is stopped after reaching or entering the etching transition layer, subjecting the part of the etching transition layer located in the selected region to thermal decomposition through thermal treatment to be completely removed, and realizing termination of thermal decomposition on another semiconductor layer, so as to precisely form a trench structure in the semiconductor material layer.

Abstract: The present application discloses a semiconductor device and a manufacturing method thereof. The manufacturing method comprises manufacturing a semiconductor material layer comprising two laminated semiconductor layers between which an etching transition layer is provided; and etching a part of one of semiconductor layers located in a selected region until etching is stopped after reaching or entering the etching transition layer, subjecting the part of the etching transition layer located in the selected region to thermal decomposition through thermal treatment to be completely removed, and realizing termination of thermal decomposition on another semiconductor layer, so as to precisely form a trench structure in the semiconductor material layer.