Patents by Inventor Xiaonong Ran

Xiaonong Ran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6005981
    Abstract: An encoding process is configurable to trade calculational complexity for bit rate while maintaining code format and image quality. A software encoder which implements the encoding process monitors bandwidth and processor utilization and when either is overtaxed, adjusts complexity to compensate. If further adjustment is required, encoded image quality is changed. Changing the search process or search window size used during searches for predictive blocks or changing a threshold which is compared to inter-code length before determining whether to calculate an intra-code changes complexity. An intra-coding method subtracts a base which depends on codes representing neighboring blocks from coefficients for a current block to determine a difference which is often small and easily compressed. Additionally, restricting a quadtree structure for one color component to a sub-tree of a quadtree structure for another other color component improves compression efficiency and reduces coding complexity.
    Type: Grant
    Filed: April 11, 1996
    Date of Patent: December 21, 1999
    Assignee: National Semiconductor Corporation
    Inventors: Hak-Leong Ng, Xiaonong Ran
  • Patent number: 5991455
    Abstract: A hashing-based vector quantization process partitions a codebook into buckets. A hashing function determines the locations of buckets in the codebook and is selected so that buckets containing similar codevectors start near each other in the codebook. One hashing function forms an index from the most significant bits of components of a vector. During encoding, the hashing function generates an index from an input vector, and a search for a codevector matching the image vector begins in a bucket indicated by the index. In one embodiment, the codebook contains flag fields to indicate the starts of buckets and pointer fields to create linked lists of codevectors which form the buckets. Codevectors are compared to the input vector by determining the mean squared error of the difference between the codevector and the input vector. A search is complete when the search finds a codevector having a difference with a MSE less than a threshold.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: November 23, 1999
    Assignee: National Semiconductor Corporation
    Inventors: Chang Y. Choo, Xiaonong Ran
  • Patent number: 5832131
    Abstract: A hashing-based vector quantization process partitions a codebook into buckets. A hashing function determines the locations of buckets in the codebook and is selected so that buckets containing similar codevectors start near each other in the codebook. One hashing function forms an index from the most significant bits of components of a vector. During encoding, the hashing function generates an index from an input vector, and a search for a codevector matching the image vector begins in a bucket indicated by the index. In one embodiment, the codebook contains flag fields to indicate the starts of buckets and pointer fields to create linked lists of codevectors which form the buckets. Codevectors are compared to the input vector by determining the mean squared error of the difference between the codevector and the input vector. A search is complete when the search finds a codevector having a difference with a MSE less than a threshold.
    Type: Grant
    Filed: May 3, 1995
    Date of Patent: November 3, 1998
    Assignee: National Semiconductor Corporation
    Inventors: Chang Y. Choo, Xiaonong Ran
  • Patent number: 5768434
    Abstract: Two dimensional data structures are represented by quadtree codes with embedded Walsh transform coefficients. The quadtree code permits both variable block size inherent in quadtrees, and the calculational simplicity of Walsh transform descriptions of nearly uniform blocks of data. Construction of the quadtree is calculationally simple for implementation in a digital system which does a bottom-up determination of the quadtree because Walsh transform coefficients and a measure of the distortion can be recursively calculated using only Walsh transform coefficients from the previous level in the quadtree. Uniform step size quantization, which is optimal for variable length coding and generalized gaussian distributions, permits fast encoding and decoding of quadtree code.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 16, 1998
    Assignee: National Semiconductor Corp.
    Inventor: Xiaonong Ran
  • Patent number: 5768533
    Abstract: A communication system and protocol uses retransmission techniques for video transmission on mobile/wireless channels. The system partitions frames of a moving image into frame segments, and combines a sequence of frame segments to form a sub-sequence of the moving image. The sub-sequences are treated as separate images which are separately encoded and transmitted to a receiver and then are combined to reassemble the moving image. A sender transmits to the receiver data packets, each data packet representing all or part of a digital code for a frame segment. The receiver requests retransmission of data packets containing detectable errors, indicates in a status buffer which digital codes have been received and whether the digital codes are intra or inter codes, and displays a frame only after all required data packets have been received without detectable errors.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: June 16, 1998
    Assignee: National Semiconductor Corporation
    Inventor: Xiaonong Ran
  • Patent number: 5706059
    Abstract: A hierarchial search for moving image encoding determines a motion vector by comparing a target block to sets of blocks selected according to the results of previous comparisons. Typically, each set of blocks includes a central block and four blocks offset on x and y axes. Blocks most similar to the target block provide co-ordinates of a center block in a next stage of the search. The hierarchial search searches regions indicated by previous comparisons to be similar to the target block and thereby reduces the number of comparisons and the search time required to find a motion vector. A motion estimation circuit for the hierarchial search includes: five processing elements which compare the target block to five blocks; a first memory that asserts a target block pixel value to the processing elements; a second memory that asserts five search window pixel values to the processing elements.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: January 6, 1998
    Assignee: National Semiconductor Corp.
    Inventors: Xiaonong Ran, Michael van Scherrenburg
  • Patent number: 5654702
    Abstract: A variable length coding process encodes a string of symbol values using arithmetic coding models selected according to the syntax of the string. The arithmetic coding models are optimized for each separate symbol in the string to provide efficient coding that provides a shorter average code length than is provided with arithmetic coding using a single model. In an embodiment for moving image coding, two sets of arithmetic coding models, one for intra frames and one for inter frames, are used for a series symbols representing DCT blocks. The model used for a symbol depends of the symbol's value and order in the series.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: August 5, 1997
    Assignee: National Semiconductor Corp.
    Inventor: Xiaonong Ran
  • Patent number: 5644361
    Abstract: A video compression system in accordance with the present invention may use a frame buffer which is only a fraction of the size of a full frame buffer. A subsampler connected to an input of the frame buffer performs 4 to 1 subsampling on the video data to be stored in the frame buffer. This allows the frame buffer to be one-fourth the size of a full frame buffer. The subsampling may even be 9 to 1, 16 to 1, or another ratio, for a concomitant decrease in frame buffer size. An upsampler is connected to the output of the frame buffer for providing interpolated and filtered values between the subsamples. Novel methods of filtering and interpolating performed by the upsampler are described. A new motion estimation technique is also described herein which directly detects the number of bits required to be transmitted to convey the difference between the predicted video data and the current video data, where a fewer number of bits used to convey the difference corresponds to better motion estimation.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: July 1, 1997
    Assignee: National Semiconductor Corporation
    Inventors: Xiaonong Ran, Michael Van Scherrenburg
  • Patent number: 5627601
    Abstract: A new motion estimation technique is described herein which directly detects the number of bits required to be transmitted to convey the difference between the predicted video data and the current video data, where a fewer number of bits used to convey the difference corresponds to better motion estimation. The search criterion for the best estimate of movement of a block is the minimum number of bits for conveying this difference instead of minimizing the mean squared error (MSE) or mean average difference (MAD). Thus, complex calculations involving MSD or MAD are avoided. The motion estimator of the preferred embodiment uses a look-up table to convert motion compensated difference signals for a block of pels into the number of bits required to be transmitted to convey the difference signals.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: May 6, 1997
    Assignee: National Semiconductor Corporation
    Inventors: Xiaonong Ran, Michael van Scherrenburg
  • Patent number: 5587710
    Abstract: A coder/decoder selects one of a set of look-up tables for encoding/decoding a symbol. Each look-up table contains boundary values that result from an arithmetic coding model partitioning a first interval. A second interval contains an arithmetic code. During encoding, look-up table entries for a symbol value are converted to the scale of the second interval. The scaled values indicate a smaller interval containing the arithmetic code. Code bits are generated when most significant bits of upper and lower scaled values are equal. During decoding, a code word, which is a part of an arithmetic code, is normalized from the scale of the second interval to the scale for a look-up table and then compared to entries of the look-up table. When a segment containing the code word is identified, a decoded symbol value is known. A scaling circuit converts boundary values for the segment to the scale of the second interval then changes the second interval.
    Type: Grant
    Filed: March 24, 1995
    Date of Patent: December 24, 1996
    Assignee: National Semiconductor Corporation
    Inventors: Chang Y. Choo, Xiaonong Ran, Christine A. Porter, Mohammad R. Motamedi
  • Patent number: 5581302
    Abstract: A video compression system in accordance with the present invention may use a frame buffer which is only a fraction of the size of a full frame buffer. A subsampler connected to an input of the frame buffer performs 4 to 1 subsampling on the video data to be stored in the frame buffer. This allows the frame buffer to be one-fourth the size of a full frame buffer. The subsampling may even be 9 to 1, 16 to 1, or another ratio, for a concomitant decrease in frame buffer size. An upsampler is connected to the output of the frame buffer for providing interpolated and filtered values between the subsamples. Novel methods of filtering and interpolating performed by the upsampler are described. A new motion estimation technique is also described herein which directly detects the number of bits required to be transmitted to convey the difference between the predicted video data and the current video data, where a fewer number of bits used to convey the difference corresponds to better motion estimation.
    Type: Grant
    Filed: May 30, 1995
    Date of Patent: December 3, 1996
    Assignee: National Semiconductor Corporation
    Inventors: Xiaonong Ran, Michael Van Scherrenburg
  • Patent number: 5446806
    Abstract: Two dimensional data structures are represented by quadtree codes with embedded Walsh transform coefficients. The quadtree code permits both variable block size inherent in quadtrees, and the calculational simplicity of Walsh transform descriptions of nearly uniform blocks of data. Construction of the quadtree is calculationally simple for implementation in a digital system which does a bottom-up determination of the quadtree because Walsh transform coefficients and a measure of the distortion can be recursively calculated using only Walsh transform coefficients from the previous level in the quadtree. Uniform step size quantization, which is optimal for variable length coding and generalized gaussian distributions, permits fast encoding and decoding of quadtree code.
    Type: Grant
    Filed: November 15, 1993
    Date of Patent: August 29, 1995
    Assignee: National Semiconductor Corporation
    Inventors: Xiaonong Ran, Micheal Van Scherrenburg