Patents by Inventor Xiaorong Luo

Xiaorong Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11965845
    Abstract: The present invention provides a device and a method for measuring fluid saturation in nuclear magnetic resonance (NMR) on-line displacement, the method comprising: measuring a nuclear magnetic resonance (NMR) T2 spectrum under the dead volume filling of the on-line displacement system as displacing phase fluid and the core to be measured as saturated nuclear magnetic detection phase fluid to generate a calibrated T2 spectrum; measuring a nuclear magnetic resonance (NMR) T2 spectrum of a process in which the core to be measured is converted from a saturated displaced phase fluid into a displacing phase fluid to generate a displacement process T2 spectrum; generating the fluid saturation of the on-line displacement system in real time according to the generated calibrated T2 spectrum and the displacement process T2 spectrum. The present invention achieves the purpose of improving measurement precision of fluid saturation in the on-line displacement process.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: April 23, 2024
    Assignees: Institute of Geology and Geophysics, Chinese Academy of Sciences, Northeast Petroleum University
    Inventors: Likuan Zhang, Xiaorong Luo, Jianzhao Yan, Yuhong Lei, Ming Cheng, Naigui Liu
  • Publication number: 20230045602
    Abstract: The present invention provides a device and a method for measuring fluid saturation in nuclear magnetic resonance (NMR) on-line displacement, the method comprising: measuring a nuclear magnetic resonance (NMR) T2 spectrum under the dead volume filling of the on-line displacement system as displacing phase fluid and the core to be measured as saturated nuclear magnetic detection phase fluid to generate a calibrated T2 spectrum; measuring a nuclear magnetic resonance (NMR) T2 spectrum of a process in which the core to be measured is converted from a saturated displaced phase fluid into a displacing phase fluid to generate a displacement process T2 spectrum; generating the fluid saturation of the on-line displacement system in real time according to the generated calibrated T2 spectrum and the displacement process T2 spectrum. The present invention achieves the purpose of improving measurement precision of fluid saturation in the on-line displacement process.
    Type: Application
    Filed: July 8, 2022
    Publication date: February 9, 2023
    Inventors: Likuan Zhang, Xiaorong Luo, Jianzhao Yan, Yuhong Lei, Ming Cheng, Naigui Liu
  • Publication number: 20210056106
    Abstract: An apparatus, method and computer program product for query optimization in a Relational Database Management System (RDBMS), wherein an optimizer accesses a query expression repository (QER), so that the optimizer learns from previous versions of the queries to improve current and subsequent versions of the queries. The QER stores planning and execution information for QEs from the previous versions of the queries, wherein the QEs comprise table relations, intermediate results and/or final results of operations in the previous versions of the queries. The optimizer searches the QER for QEs from the query execution plans, and uses information from the QEs stored in the QER when optimizing the current and subsequent versions of the queries. The optimizer may also reuses results from the QEs stored in the QER.
    Type: Application
    Filed: December 27, 2019
    Publication date: February 25, 2021
    Applicant: Teradata US, Inc.
    Inventors: Grace Kwan-On Au, Nobul Reddy Goli, Vivek Kumar, Ming Zhang, Bin Cao, Sanjay Nair, Kanaka Durga Rajanala, Sanjib Mishra, Naveen Jaiswal, Lu Ma, Xiaorong Luo
  • Patent number: 10928337
    Abstract: The invention relates to a high-temperature and high-pressure nuclear magnetic resonance core holder. An inner cylinder body of the core holder is provided in an outer cylinder body, a nuclear magnetic resonance probe coil is provided between the outer cylinder body and the inner cylinder body, two plugging sleeves are respectively provided between both ends of the inner cylinder body and between both ends of the outer cylinder body, a sealing groove is provided at the inner side of each plugging sleeve, a sealing joint component is provided in each sealing groove of each plugging sleeve, and two ends of the nuclear magnetic resonance probe coil are respectively connected with the sealing joint component, so that the nuclear magnetic resonance probe coil can be led out.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: February 23, 2021
    Assignee: INSTITUTE OF GEOLOGY AND GEOPHYSICS CHINESE ACADEMY OF SCIENCES (IGGCAS)
    Inventors: Naigui Liu, Xiaorong Luo, Likuan Zhang, Yuhong Lei, Ming Cheng, Jianzhao Yan
  • Publication number: 20200378911
    Abstract: The invention relates to a high-temperature and high-pressure nuclear magnetic resonance core holder. An inner cylinder body of the core holder is provided in an outer cylinder body, a nuclear magnetic resonance probe coil is provided between the outer cylinder body and the inner cylinder body, two plugging sleeves are respectively provided between both ends of the inner cylinder body and between both ends of the outer cylinder body, a sealing groove is provided at the inner side of each plugging sleeve, a sealing joint component is provided in each sealing groove of each plugging sleeve, and two ends of the nuclear magnetic resonance probe coil are respectively connected with the sealing joint component, so that the nuclear magnetic resonance probe coil can be led out.
    Type: Application
    Filed: April 22, 2020
    Publication date: December 3, 2020
    Applicant: INSTITUTE OF GEOLOGY AND GEOPHYSICS CHINESE ACADEMY OF SCIENCES (IGGCAS)
    Inventors: Naigui LIU, Xiaorong LUO, Likuan ZHANG, Yuhong LEI, Ming CHENG, Jianzhao YAN
  • Patent number: 10340373
    Abstract: The present invention relates to the technical field of the power semiconductor device relates to a reverse conducting insulated gate bipolar transistor (RC-IGBT). The RC-IGBT comprises a P-type region, an N-type emitter region, a P-type body contact region, a dielectric trench, a collector region, and an electrical filed cutting-off region. The beneficial effect of the present invention is that, when compared with traditional RC-IGBT, the IGBT of the present invention can eliminate negative resistance effect and effectively improve the performance of forward and reverse conduction.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: July 2, 2019
    Assignee: University of Electronic Science and Technology of China
    Inventors: Xiaorong Luo, Gaoqiang Deng, Kun Zhou, Qing Liu, Linhua Huang, Tao Sun, Bo Zhang
  • Patent number: 10304931
    Abstract: The present invention belongs to the field of semiconductor technology and relates to a polarization-doped enhancement mode HEMT device. The technical solution of the present invention grows the first barrier layer and the second barrier layer that contain gradient Al composition sequentially on the buffer layer. The gradient trends of the two layers are opposite. The three-dimensional electron gas (3DEG) and the three-dimensional hole gas (3DHG) are induced and generated in the barrier layers due to the inner polarization difference respectively. A trench insulated gate structure is at one side of the source which is away from the metal drain and is in contact with the source. First, since the highly concentrated electrons exist in the entire first barrier layer, the on-state current is improved greatly. Second, the vertical conductive channel between the source and the 3DEG are pinched off by the 3DHG, so as to realize the enhancement mode.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: May 28, 2019
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Xiaorong Luo, Fu Peng, Chao Yang, Jie Wei, Siyu Deng, Dongfa Ouyang, Bo Zhang
  • Publication number: 20180294335
    Abstract: The present invention belongs to the field of semiconductor technology and relates to a polarization-doped enhancement mode HEMT device. The technical solution of the present invention grows the first barrier layer and the second barrier layer that contain gradient Al composition sequentially on the buffer layer. The gradient trends of the two layers are opposite. The three-dimensional electron gas (3DEG) and the three-dimensional hole gas (3DHG) are induced and generated in the barrier layers due to the inner polarization difference respectively. A trench insulated gate structure is at one side of the source which is away from the metal drain and is in contact with the source. First, since the highly concentrated electrons exist in the entire first barrier layer, the on-state current is improved greatly. Second, the vertical conductive channel between the source and the 3DEG are pinched off by the 3DHG, so as to realize the enhancement mode.
    Type: Application
    Filed: June 14, 2017
    Publication date: October 11, 2018
    Applicant: University of Electronic Science and Technology of China
    Inventors: Xiaorong LUO, Fu PENG, Chao YANG, Jie WEI, Siyu DENG, Dongfa OUYANG, Bo ZHANG
  • Publication number: 20180061972
    Abstract: The present invention relates to the technical field of the power semiconductor device relates to a reverse conducting insulated gate bipolar transistor (RC-IGBT). The RC-IGBT comprises a P-type region, an N-type emitter region, a P-type body contact region, a dielectric trench, a collector region, and an electrical filed cutting-off region. The beneficial effect of the present invention is that, when compared with traditional RC-IGBT, the IGBT of the present invention can eliminate negative resistance effect and effectively improve the performance of forward and reverse conduction.
    Type: Application
    Filed: May 22, 2017
    Publication date: March 1, 2018
    Applicant: University of Electronic Science and Technology of China
    Inventors: Xiaorong LUO, Gaoqiang DENG, Kun ZHOU, Qing LIU, Linhua HUANG, Tao SUN, Bo ZHANG
  • Patent number: 9620638
    Abstract: A tri-gate laterally-diffused metal oxide semiconductor (LDMOS), including a substrate, a P-type semiconductor region, a P-type contact region, an N-type source region, a gate dielectric layer, an N-type drift region, a first isolation dielectric layer, an N-type drain region, and a second isolation dielectric layer. The P-type semiconductor region is disposed on one end of an upper surface of the substrate, and the N-type drift region is disposed on another end of the upper surface. The P-type semiconductor region contacts with the N-type drift region. The P-type contact region and the N-type source region are disposed on one side of the P-type semiconductor region which is away from the N-type drift region, and compared with the P-type contact region, the N-type source region is in the vicinity of the N-type drift region.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: April 11, 2017
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Xiaorong Luo, Weiwei Ge, Junfeng Wu, Da Ma, Mengshan Lv, Linhua Huang, Qing Liu, Tao Sun
  • Patent number: 9431527
    Abstract: An enhancement mode HEMT, including: a substrate layer; a buffer layer; barrier layers; drain electrodes; reverse polarization semiconductor layers; source electrodes; an insulated gate dielectric; and a metal gate electrode The buffer layer is disposed on the substrate layer, and the barrier layers are disposed on the buffer layer. Interfaces between the buffer layer and the barrier layers are provided with first heterojunctions having a two-dimensional electron gas (2DEG) channel. The drain electrodes are disposed at one end of the upper surfaces of the barrier layers and form Ohmic contact with the barrier layers. The reverse polarization semiconductor layers are disposed on the upper surfaces of the barrier layers and are able to produce inversed polarization with the barrier layers. The interfaces between reverse polarization semiconductor layers and barrier layers are provided with second heterojunctions having two-dimensional hole gas (2DHG).
    Type: Grant
    Filed: December 27, 2015
    Date of Patent: August 30, 2016
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Xiaorong Luo, Jiayun Xiong, Chao Yang, Jie Wei, Junfeng Wu, Fu Peng, Bo Zhang
  • Patent number: 8890280
    Abstract: The present invention relates to a semiconductor device. The device comprises a semiconductor substrate. A semiconductor drift region is on the semiconductor substrate. The semiconductor drift region comprises a semiconductor region of a first conduction type and a semiconductor region of a second conduction type. The semiconductor region of the first conduction type and the semiconductor region of the second conduction type form a superjunction structure. A high-K dielectric is on the semiconductor substrate. The high-K dielectric is adjacent to the semiconductor region of the second conduction type. An active region is on the semiconductor drift region. A trench gate structure is on the high-K dielectric, the trench gate structure being adjacent to the active region. The semiconductor region of the second conduction type is formed by shallow angle ion implantation, thus its width is narrow and its concentration is high.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: November 18, 2014
    Assignee: University of Electronic Science and Technology of China
    Inventors: Xiaorong Luo, Guoliang Yao, Tianfei Lei, Yuangang Wang, Bo Zhang
  • Patent number: 8716794
    Abstract: The present invention relates to a semiconductor power device and power integrated circuits (ICs). The lateral SOI MOSFET in the present comprises a trench gate extended to the dielectric buried layer, one or multiple dielectric trenches in the drift region, and a buried gate in said dielectric trench. The permittivity of the dielectric in said dielectric trench is lower than that of said active layer. Firstly, said dielectric trench not only greatly improves breakdown voltage, but also reduces pitch size. Secondly, the trench gate widens the effective conductive region in the vertical direction. Thirdly, dual gates of said trench gate and buried gate increase channel and current densities. Thereby, specific on-resistance and the power loss are reduced. The device of the present invention has many advantages, such as high voltage, high speed, low power loss, low cost and ease of integration.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: May 6, 2014
    Assignee: University of Electronic Science and Technology of China
    Inventors: Xiaorong Luo, Florin Udrea
  • Publication number: 20130193509
    Abstract: The present invention relates to a semiconductor power device and power integrated circuits (ICs). The lateral SOI MOSFET in the present comprises a trench gate extended to the dielectric buried layer, one or multiple dielectric trenches in the drift region, and a buried gate in said dielectric trench. The permittivity of the dielectric in said dielectric trench is lower than that of said active layer. Firstly, said dielectric trench not only greatly improves breakdown voltage, but also reduces pitch size. Secondly, the trench gate widens the effective conductive region in the vertical direction. Thirdly, dual gates of said trench gate and buried gate increase channel and current densities. Thereby, specific on-resistance and the power loss are reduced. The device of the present invention has many advantages, such as high voltage, high speed, low power loss, low cost and ease of integration.
    Type: Application
    Filed: August 10, 2010
    Publication date: August 1, 2013
    Applicant: University of Electronic Science and Technology of China
    Inventors: Xiaorong Luo, Florin Udrea
  • Patent number: 8396862
    Abstract: A method of searching a multilevel partitioned database includes receiving a query data from the multilevel partitioned database. At least for one level partitions are dynamically included. For some levels, partitions may also be statically included for execution of the query. The query is the executed over the partitions that are both dynamically and statically included. In one example, the cost of joining two tables in a multilevel partitioned database includes determining level partitions that can be statically included, estimating level partitions that will be dynamically considered for the join, and determining a cost as a function of the estimated statically included level partitions and estimated dynamically included level partitions.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: March 12, 2013
    Assignee: Teradata US, Inc.
    Inventors: Paul Sinclair, Xiaorong Luo, Mark Sirek
  • Publication number: 20120168856
    Abstract: The present invention relates to a semiconductor device. The device comprises a semiconductor substrate. A semiconductor drift region is on the semiconductor substrate. The semiconductor drift region comprises a semiconductor region of a first conduction type and a semiconductor region of a second conduction type. The semiconductor region of the first conduction type and the semiconductor region of the second conduction type form a superjunction structure. A high-K dielectric is on the semiconductor substrate. The high-K dielectric is adjacent to the semiconductor region of the second conduction type. An active region is on the semiconductor drift region. A trench gate structure is on the high-K dielectric, the trench gate structure being adjacent to the active region. The semiconductor region of the second conduction type is formed by shallow angle ion implantation, thus its width is narrow and its concentration is high.
    Type: Application
    Filed: February 24, 2011
    Publication date: July 5, 2012
    Applicant: University of Electronic Science and Technology of China
    Inventors: Xiaorong Luo, Guoliang Yao, Tianfei Lei, Yuangang Wang, Bo Zhang
  • Patent number: D937338
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: November 30, 2021
    Inventor: Xiaorong Luo
  • Patent number: D939976
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: January 4, 2022
    Inventor: Xiaorong Luo
  • Patent number: D945866
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: March 15, 2022
    Inventor: Xiaorong Luo
  • Patent number: D953150
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: May 31, 2022
    Inventor: Xiaorong Luo