Abstract: Methods, systems, and computer programs are presented for virtualizing Non-Volatile Random Access Memory (NVRAM). A first area in RAM is labeled as active area and a second area as non-active area, and an active journal and a non-active journal are created in permanent storage. A transaction is created for each write made to the virtual NVRAM, and the created transactions are written to the active journal and to the active area. When the active journal is greater than a predetermined size or a timeout occurs, a checkpoint is created by copying contents from the active area to the non-active area, switching status of the active area and the non-active areas (the active area becomes the non-active area and the non-active area becomes the active area), switching status of the active journal and the non-active journal, and copying the content of the current non-active area to permanent storage.

Abstract: Methods, systems, and computer programs are presented for virtualizing Non-Volatile Random Access Memory (NVRAM). A first area in RAM is labeled as active area and a second area as non-active area, and an active journal and a non-active journal are created in permanent storage. A transaction is created for each write made to the virtual NVRAM, and the created transactions are written to the active journal and to the active area. When the active journal is greater than a predetermined size or a timeout occurs, a checkpoint is created by copying contents from the active area to the non-active area, switching status of the active area and the non-active areas (the active area becomes the non-active area and the non-active area becomes the active area), switching status of the active journal and the non-active journal, and copying the content of the current non-active area to permanent storage.

Abstract: A memory system controller includes one or more sockets for accommodating NVDIMM cards produced by different NVDIMM providers; a PCIe interface for coupling the memory system controller to a host; and a controller coupled to the PCIe interface over a PCIe-compliant connection and to the one or more sockets over respective DDR2 connections. The controller is configured to manage data transfers between the host and a specified one of the NVDIMM sockets in which an NVDIMM card is accommodated as DMA reads and writes, format data received from the PCIe interface for transmission to the specified NVDIMM socket over the corresponding one or more DDR2 interfaces, and initiate save and restore operations on the NVDIMM card accommodated within the specified NVDIMM socket in response to power failure and power restoration indications.

Abstract: A memory system controller includes one or more sockets for accommodating NVDIMM cards produced by different NVDIMM providers; a PCIe interface for coupling the memory system controller to a host; and a controller coupled to the PCIe interface over a PCIe-compliant connection and to the one or more sockets over respective DDR2 connections. The controller is configured to manage data transfers between the host and a specified one of the NVDIMM sockets in which an NVDIMM card is accommodated as DMA reads and writes, format data received from the PCIe interface for transmission to the specified NVDIMM socket over the corresponding one or more DDR2 interfaces, and initiate save and restore operations on the NVDIMM card accommodated within the specified NVDIMM socket in response to power failure and power restoration indications.

Abstract: A method and apparatus for displaying logical information upon devices within a computer system. The method and apparatus include a logical volume information server coupled to a volume manager that provides the logical information that is created by the volume manager to at least one device. The at least one device comprise a logical volume information client that receives the logical information from the logical volume information server and displays that logical volume information upon the network or storage device. In this manner, an operator may quickly identify the logical information that corresponds to a physical device within a network or a storage appliance.

Abstract: A memory system controller includes one or more sockets for accommodating NVDIMM cards produced by different NVDIMM providers; a PCIe interface for coupling the memory system controller to a host; and a controller coupled to the PCIe interface over a PCIe-compliant connection and to the one or more sockets over respective DDR2 connections. The controller is configured to manage data transfers between the host and a specified one of the NVDIMM sockets in which an NVDIMM card is accommodated as DMA reads and writes, format data received from the PCIe interface for transmission to the specified NVDIMM socket over the corresponding one or more DDR2 interfaces, and initiate save and restore operations on the NVDIMM card accommodated within the specified NVDIMM socket in response to power failure and power restoration indications.