Patents by Inventor Xiaowei Liu

Xiaowei Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180125969
    Abstract: Provided herein are methods for rational design of nicotine haptens. More particularly, provided herein are methods for designing, selecting, and synthesizing nicotine haptens and nicotine hapten conjugates. Also provided herein are novel nicotine haptens and methods for using nicotine haptens to treat nicotine addiction.
    Type: Application
    Filed: January 5, 2018
    Publication date: May 10, 2018
    Inventors: Yung Chang, Sidney Hecht, Joseph Leal, Viswanath Arutla, Xiaowei Liu, Sriram Sokalingam
  • Patent number: 9884114
    Abstract: Provided herein are methods for rational design of nicotine haptens. More particularly, provided herein are methods for designing, selecting, and synthesizing nicotine haptens and nicotine hapten conjugates. Also provided herein are novel nicotine haptens and methods for using nicotine haptens to treat nicotine addiction.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: February 6, 2018
    Assignee: Arizona Board of Regents on Behalf of Arizona State University
    Inventors: Yung Chang, Sidney Hecht, Joseph Leal, Viswanath Arutla, Xiaowei Liu, Sriram Sokalingam
  • Publication number: 20180031896
    Abstract: The present disclosure relates to an array substrate, a method of manufacturing the same and a display device. The array substrate comprises a gate line PAD region and a data line PAD region. In the gate line PAD region of the array substrate, gate-line wirings, which are parallel to the gate lines and are electrically insulated from the gate lines, are provided between adjacent gate lines. In the data line PAD region of the array substrate, data-line wirings, which are parallel to the data lines and are electrically insulated from the data lines, are provided between adjacent data lines. Both of the gate-line wirings and the data-line wirings are conductive wiring segments. By forming the gate-line wirings and the data-line wirings in the PAD region, the ability of resisting scratch of the product can be improved while not deteriorating performance of display of the product.
    Type: Application
    Filed: October 6, 2017
    Publication date: February 1, 2018
    Inventors: Xiaowei Liu, Xi Chen, Zhenfei Cai, Yao Liu, Liangliang Li, Zongjie Guo
  • Patent number: 9881090
    Abstract: The present invention provides a method and apparatus for providing information and a method and apparatus for providing a search result. The method for providing information comprises: acquiring a current hotspot event, and determining a first keyword corresponding to the current hotspot event; determining a second keyword matched with the first keyword in a pre-built first database, and determining an information provider suitable for hotspot correlation according to the second keyword, the first database comprising the information provider and the second keyword corresponding to the information provider; and generating hotspot information materials of the information provider suitable for hotspot correlation according to the first keyword, and making the hotspot information materials online so as to be provided for a user.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: January 30, 2018
    Assignee: BAIDU ONLINE NETWORK TECHNOLOGY (BEIJING) CO., LTD.
    Inventors: Daolong Wang, Jun Li, Xiaowei Liu, Huaming Li, Yufei Yan, Meng Liu, Yi Yuan
  • Patent number: 9879343
    Abstract: A detection device includes a chamber for vacuum coating, a capacitance measurement device and a baffle mechanism located in the chamber. The baffle mechanism is a closed structure encompassed by a number of baffle walls, wherein at least one baffle wall includes a fixed baffle plate and a moveable baffle plate. The moveable baffle plate is pivotable about the fixed baffle plate. The moveable baffle plate, after pivoting, may get parallel with an adjacent baffle wall. The adjacent baffle wall and the moveable baffle plate are respectively connected to the capacitance measurement device, and the capacitance measurement device is used to measure the capacitance between the adjacent baffle wall and the moveable baffle plate. The detection device may accurately detect the service life of the baffle mechanism and achieve precise management of the apparatus.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: January 30, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO. LTD.
    Inventors: Xiaowei Liu, Yao Liu, Xiangqian Ding, Jinchao Bai
  • Patent number: 9828654
    Abstract: Provided is a method for directly recovering lead oxide used for a lead-acid battery negative electrode from waste lead paste. The method comprises: (1) contacting waste lead paste with a barium-containing desulphurizer under desulphurization reaction conditions, and performing a solid-liquid separation on the mixture after contacting to obtain a filtrate and a filtration residue; and (2) performing a conversion reaction on the above-mentioned filtration residue at a temperature of 350-750° C. so as to convert the lead-containing components in the filtration residue into lead oxide. In the method, the direct recovery of a lead oxide raw material applicable to a lead-acid battery negative electrode from waste lead paste is achieved by quantitatively replenishing a barium sulphate additive in the process of desulphuration thereby substantially decreasing the recovery cost and energy consumption, and improving the comprehensive utilization of waste lead paste.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: November 28, 2017
    Assignee: CHILWEE POWER CO. LTD & BEIJING UNIVERSITY OF CHEMICAL TECHNOLOGY
    Inventors: Junqing Pan, Yongquan Ma, Yanzhi Sun, Xiaoxiang Cai, Yinjian Niu, Xiaowei Liu, Shuang Song, Tixian Chen, Guoqing Cao, Mingming Zhou, Xinxin Yang, Longrui Zhou, Yunfei Yang
  • Patent number: 9828653
    Abstract: Provided is a method for recycling a lead oxide-containing waste material, comprising: (1) contacting the lead oxide-containing waste material with a desulphurizer under desulphurization reaction conditions, and performing a solid-liquid separation on the mixture after contacting to obtain a filtrate and a filtration residue; (2) performing a conversion reaction on the above-mentioned filtration residue at a temperature of 350-750° C. so as to convert the lead-containing components in the filtration residue into lead oxide; (3) contacting the product obtained from step (2) with an alkaline solution so as to dissolve the PbO therein, and then performing a solid-liquid separation to obtain a PbO-alkaline solution; and (4) crystallizing the PbO-alkaline solution from step (3) to obtain PbO crystals and an alkaline filtrate. The method can reduce the energy consumption.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: November 28, 2017
    Assignee: CHILWEE POWER CO. LTD & BEIJING UNIVERSITY OF CHEMICAL TECHNOLOGY
    Inventors: Junqing Pan, Xiaowei Liu, Yanzhi Sun, Yongquan Ma, Yinjian Niu, Tixian Chen, Xuan Zhang, Xiaoxiang Cai, Shuang Song, Mingming Zhou, Longrui Zhou, Guoqing Cao, Xinxin Yang, Jianglin Wang, Xin Wu
  • Patent number: 9817287
    Abstract: The present disclosure relates to an array substrate, a method of manufacturing the same and a display device. The array substrate comprises a gate line PAD region and a data line PAD region. In the gate line PAD region of the array substrate, gate-line wirings, which are parallel to the gate lines and are electrically insulated from the gate lines, are provided between adjacent gate lines. In the data line PAD region of the array substrate, data-line wirings, which are parallel to the data lines and are electrically insulated from the data lines, are provided between adjacent data lines. Both of the gate-line wirings and the data-line wirings are conductive wiring segments. By forming the gate-line wirings and the data-line wirings in the PAD region, the ability of resisting scratch of the product can be improved while not deteriorating performance of display of the product.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: November 14, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD, BEIJING BOE DISPLAY TECHNOLOGY CO., LTD
    Inventors: Xiaowei Liu, Xi Chen, Zhenfei Cai, Yao Liu, Liangliang Li, Zongjie Guo
  • Publication number: 20170285807
    Abstract: The embodiments of the disclosure disclose a touch display panel, a method for fabrication thereof and a display device. The touch display panel comprises a display substrate, a transparent conductive layer formed on the display substrate, a transparent insulating layer formed on the transparent conductive layer, and a touch electrode formed on the transparent insulating layer. The embodiments of the disclosure can reduce accumulation of static electricity in the manufacture procedure of the display substrate and prevent electromagnetic interference when performing cell test by adding a transparent conductive layer and a transparent insulating layer between the touch substrate and the touch electrode.
    Type: Application
    Filed: April 14, 2016
    Publication date: October 5, 2017
    Applicants: Boe Technology Group Co., Ltd., Beijing Boe Display Technology Co., Ltd.
    Inventors: Xiaowei LIU, Yao LIU, Liangliang LI, Xiangqian DING, Jinchao BAI
  • Publication number: 20170212621
    Abstract: Disclosed is an array substrate including a base substrate and a gate metal layer, a semiconductor layer, a source-drain metal layer, and a pixel electrode layer that are formed on the base substrate. The gate metal layer includes gate lines, gate electrodes of thin film transistors, and a plurality of first sensing lines extending along a row direction. The semiconductor layer includes an active layer of the thin film transistors, and a plurality of first photosensitive elements and a plurality of second photosensitive elements that are insulated from each other. The source-drain metal layer includes data lines, source electrodes and drain electrodes of the thin film transistors, and a plurality of second sensing lines extending along a column direction. Also disclosed are a method of fabricating the array substrate, an optical touch screen and a display device.
    Type: Application
    Filed: March 24, 2016
    Publication date: July 27, 2017
    Inventors: Jinchao Bai, Tsungchieh Kuo, Xiangqian Ding, Yao Liu, Xiaowei Liu, Xi Chen
  • Patent number: 9711356
    Abstract: The present invention discloses a method for manufacturing a thin-film transistor, comprising the steps of: forming a semiconductor active layer, and a doped semiconductor active layer; forming a source-drain metal layer; forming a channel region; and implanting ions for lowering the TFT leakage current into the surface of the semiconductor active layer in the channel region via ion implantation after forming the channel region. The invention further relates to a thin-film transistor, a TFT array substrate and a display device. The invention has the following beneficial effects: by implanting ions for lowering the TFT leakage current into the channel region, the electrical performance of a TFT may be improved, and the thickness of a semiconductor active layer in a channel region may be changed controllably.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: July 18, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Shoukun Wang, Huibin Guo, Xiaowei Liu, Yuchun Feng, Zongjie Guo
  • Publication number: 20170185431
    Abstract: A method and apparatus for dynamically implementing an application function is provided, wherein the method includes sending status information to a network device; obtaining a layout information function configuration file fed back from the network device; and creating a window body and a program control based on the layout information function configuration file and establishing a link between the program control and the application function. By creating, through a layout information function configuration file, a display window and a program control in a terminal device, the present invention creates a link between the program control and the application function, so as to achieve fast development, adaptation, and release of the application; besides, personalized adaptation for a specific resolution, launching of a new function, and problem fixing may be implemented without releasing a new-version application.
    Type: Application
    Filed: October 27, 2015
    Publication date: June 29, 2017
    Applicant: BAIDU ONLINE NETWORK TECHNOLOGY (BEIJING) CO., LTD .
    Inventors: Wenyu LV, Jun LI, Daolong WANG, Meng LIU, Xiaowei LIU, Yufei YAN, Yinyin JIN
  • Patent number: 9590231
    Abstract: An embodiment of the present invention discloses a 3D barrier substrate and a method for manufacturing the same, and a display device in order to improve the utilization of facilities, increase the production efficiency, and decrease the cost of production. The method of manufacturing 3D barrier substrate comprises: forming a transparent electrode thin film on a substrate, and forming a passivation layer on the transparent electrode thin film; forming an transparent electrode and a passivation layer via hole by a patterning process, wherein the via hole is used for coupling the transparent electrode to the signal line; and forming a signal line, wherein the signal line is coupled to the transparent electrode through the via hole.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: March 7, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Huibin Guo, Shoukun Wang, Xiaowei Liu, Xiaming Zhu, Zongjie Guo
  • Publication number: 20160375131
    Abstract: Provided herein are methods for rational design of nicotine haptens. More particularly, provided herein are methods for designing, selecting, and synthesizing nicotine haptens and nicotine hapten conjugates. Also provided herein are novel nicotine haptens and methods for using nicotine haptens to treat nicotine addiction.
    Type: Application
    Filed: June 22, 2016
    Publication date: December 29, 2016
    Inventors: Yung Chang, Sidney Hecht, Joseph Leal, Viswanath Arutla, Xiaowei Liu, Sriram Sokalingam, Paul Pentel
  • Patent number: 9508808
    Abstract: A thin film transistor and manufacturing method thereof, an array substrate comprising the thin film transistor and manufacturing method thereof are provided. The method of manufacturing the thin film transistor comprises forming an active layer and a source-drain electrode layer, forming a photoresist layer on the source-drain electrode layer and forming a pattern of the photoresist layer by a pattern process; etching the source-drain electrode layer by using the pattern of the photoresist layer as a mask to form a pattern of the source-drain electrode layer including a source electrode and a drain electrode; and removing the photoresist, then etching the active layer by using the pattern of the source-drain electrode layer as a mask to form a pattern of the active layer.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: November 29, 2016
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd
    Inventors: Shoukun Wang, Huibin Guo, Yuchun Feng, Xiaowei Liu, Zongjie Guo
  • Patent number: 9455282
    Abstract: Provided is a manufacturing method of an array substrate with an etching stop layer. The method includes: forming a pattern including a gate, a gate line and a common electrode line on a substrate through a first patterning process; forming a gate insulation layer, an active layer film and an etching stop layer through a second patterning process; wherein, the etching stop layer corresponds to a gap between a source and a drain which are to be formed, and a via hole exposing the common electrode line is formed above the common electrode line; forming at least an active layer, a pattern including source, drain and data line and a protection layer through a third patterning process; wherein, the protection layer exposes a part of the drain; and forming at least a pixel electrode through a fourth patterning process; wherein, the pixel electrode is electrically connected with the drain.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: September 27, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Huibin Guo, Shoukun Wang, Xiaowei Liu, Yuchun Feng, Zongjie Guo
  • Publication number: 20160233247
    Abstract: An array substrate including a base substrate is disclosed; the base substrate is divided into a pixel region and a peripheral circuit region, the pixel region sequentially includes a gate electrode, a gate insulation layer, a semiconductor active layer, a pixel electrode, a source/drain electrode, a passivation layer and a common electrode; the peripheral circuit region sequentially includes a first circuit line, the gate insulation layer, a second circuit line and the passivation layer. An orthogonal projection area of the second circuit line is at least partly overlapped with an orthogonal projection area of the first circuit line on the base substrate, and the second circuit line is directly electrically connected with the first circuit line through a via hole penetrating the gate insulation layer. A method for manufacturing the array substrate and a display device including the array substrate are also disclosed.
    Type: Application
    Filed: June 12, 2015
    Publication date: August 11, 2016
    Inventors: Jinchao Bai, Zongjie Guo, Xiangqian Ding, Xiaowei Liu, Yao Liu
  • Patent number: 9412760
    Abstract: An array substrate including a base substrate is disclosed; the base substrate is divided into a pixel region and a peripheral circuit region, the pixel region sequentially includes a gate electrode, a gate insulation layer, a semiconductor active layer, a pixel electrode, a source/drain electrode, a passivation layer and a common electrode; the peripheral circuit region sequentially includes a first circuit line, the gate insulation layer, a second circuit line and the passivation layer. An orthogonal projection area of the second circuit line is at least partly overlapped with an orthogonal projection area of the first circuit line on the base substrate, and the second circuit line is directly electrically connected with the first circuit line through a via hole penetrating the gate insulation layer. A method for manufacturing the array substrate and a display device including the array substrate are also disclosed.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: August 9, 2016
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.
    Inventors: Jinchao Bai, Zongjie Guo, Xiangqian Ding, Xiaowei Liu, Yao Liu
  • Patent number: 9378953
    Abstract: Disclosed is a method for preparing a polycrystalline metal oxide pattern, characterized by comprising: annealing a predetermined region of an amorphous metal oxide film by laser, so as to convert the amorphous metal oxide in the predetermined region into a polycrystalline metal oxide; and etching the amorphous metal oxide outside of the predetermined region so as to remove it. By the method according to the present invention, firstly, the predetermined region of an amorphous metal oxide film is annealed by laser so as to convert the amorphous metal oxide into a polycrystalline metal oxide, and then, the amorphous metal oxide outside of the predetermined region is etched away, thereby a polycrystalline metal oxide pattern is formed. The method for preparing a polycrystalline metal oxide pattern according to the present invention is simple, and can effectively shorten the production period and save production costs.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: June 28, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Liangliang Li, Zongjie Guo, Huibin Guo, Shoukun Wang, Yuchun Feng, Xiaowei Liu
  • Publication number: 20160160315
    Abstract: Provided is a method for recycling a lead oxide-containing waste material, comprising: (1) contacting the lead oxide-containing waste material with a desulphurizer under desulphurization reaction conditions, and performing a solid-liquid separation on the mixture after contacting to obtain a filtrate and a filtration residue; (2) performing a conversion reaction on the above-mentioned filtration residue at a temperature of 350-750° C. so as to convert the lead-containing components in the filtration residue into lead oxide; (3) contacting the product obtained from step (2) with an alkaline solution so as to dissolve the PbO therein, and then performing a solid-liquid separation to obtain a PbO-alkaline solution; and (4) crystallizing the PbO-alkaline solution from step (3) to obtain PbO crystals and an alkaline filtrate. The method can reduce the energy consumption.
    Type: Application
    Filed: May 27, 2014
    Publication date: June 9, 2016
    Inventors: Junqing Pan, Xiaowei Liu, Yanzhi Sun, Yongquan Ma, Yinjian Niu, Tixian Chen, Xuan Zhang, Xiaoxiang Cai, Shuang Song, Mingming Zhou, Longrui Zhou, Guoqing Cao, Xinxin Yang, Jianglin Wang, Xin Wu