Patents by Inventor Xikun Wang

Xikun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11488812
    Abstract: In-situ low pressure chamber cleans and gas nozzle apparatus for plasma processing systems employing in-situ deposited chamber coatings. Certain chamber clean embodiments for conductor etch applications include an NF3-based plasma clean performed at pressures below 30 mT to remove in-situ deposited SiOx coatings from interior surfaces of a gas nozzle hole. Embodiments include a gas nozzle with bottom holes dimensioned sufficiently small to reduce or prevent the in-situ deposited chamber coatings from building up a SiOx deposits on interior surfaces of a nozzle hole.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: November 1, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Andrew Nguyen, Changhun Lee, Xiaoming He, Meihua Shen
  • Patent number: 11462411
    Abstract: A semiconductor device fabrication process includes forming gates on a substrate having a plurality of openings, each gate having a conducting layer a first metal and a gate dielectric layer of a first dielectric material, partially filling the openings with a second dielectric material, forming a first structure on the substrate in a processing system without breaking vacuum, depositing a third dielectric material over the first structure, and forming a planarized surface of the gates and a surface of the third dielectric material that is disposed over the first structure. The forming of the first structure includes forming trenches by removing second portions of the second dielectric material within each opening, forming recessed active regions in the trenches by partially filling the trenches with a second metal, forming a liner over each recessed active region, and forming a metal cap layer over each liner.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: October 4, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Gaurav Thareja, Keyvan Kashefizadeh, Xikun Wang, Anchuan Wang, Sanjay Natarajan, Sean M. Seutter, Dong Wu
  • Publication number: 20210249270
    Abstract: A semiconductor device fabrication process includes forming gates on a substrate having a plurality of openings, each gate having a conducting layer a first metal and a gate dielectric layer of a first dielectric material, partially filling the openings with a second dielectric material, forming a first structure on the substrate in a processing system without breaking vacuum, depositing a third dielectric material over the first structure, and forming a planarized surface of the gates and a surface of the third dielectric material that is disposed over the first structure. The forming of the first structure includes forming trenches by removing second portions of the second dielectric material within each opening, forming recessed active regions in the trenches by partially filling the trenches with a second metal, forming a liner over each recessed active region, and forming a metal cap layer over each liner.
    Type: Application
    Filed: April 28, 2021
    Publication date: August 12, 2021
    Inventors: Gaurav THAREJA, Keyvan KASHEFIZADEH, Xikun WANG, Anchuan WANG, Sanjay NATARAJAN, Sean M. SEUTTER, Dong WU
  • Patent number: 11062887
    Abstract: Semiconductor processing systems are described, which may include a substrate support assembly having a substrate support surface. Exemplary substrate support assemblies may include a ceramic heater defining the substrate support surface. The assemblies may include a ground plate on which the ceramic heater is seated. The assemblies may include a stem with which the ground plate is coupled. The assemblies may include an electrode embedded within the ceramic heater at a depth from the substrate support surface. The chambers or systems may also include an RF match configured to provide an AC current and an RF power through the stem to the electrode. The RF match may be coupled with the substrate support assembly along the stem. The substrate support assembly and RF match may be vertically translatable within the semiconductor processing system.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: July 13, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Soonam Park, David Benjaminson, Xikun Wang, Dmitry Lubomirsky
  • Patent number: 11024537
    Abstract: Methods and apparatus for forming an interconnect, including: depositing a first barrier layer upon a top surface of a via and a top surface of a trench; filling the via with a first metal, wherein the first metal completely fills the via and forms a metal layer within the trench; etching the metal layer within the trench to expose dielectric sidewalls of the trench, a top surface of the via, and a dielectric bottom of the trench; depositing a second barrier layer upon the dielectric sidewalls, top surface of the via, and the dielectric bottom of the trench; and filling the trench with a second metal different than the first metal.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: June 1, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Roey Shaviv, Ismail Emesh, Xikun Wang
  • Patent number: 11004687
    Abstract: A semiconductor device fabrication process includes forming gates on a substrate having a plurality of openings, each gate having a conducting layer a first metal and a gate dielectric layer of a first dielectric material, partially filling the openings with a second dielectric material, forming a first structure on the substrate in a processing system without breaking vacuum, depositing a third dielectric material over the first structure, and forming a planarized surface of the gates and a surface of the third dielectric material that is disposed over the first structure. The forming of the first structure includes forming trenches by removing second portions of the second dielectric material within each opening, forming recessed active regions in the trenches by partially filling the trenches with a second metal, forming a liner over each recessed active region, and forming a metal cap layer over each liner.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: May 11, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Gaurav Thareja, Keyvan Kashefizadeh, Xikun Wang, Anchuan Wang, Sanjay Natarajan, Sean M. Seutter, Dong Wu
  • Patent number: 10950500
    Abstract: Embodiments of methods and apparatus for filling a feature disposed in a substrate are disclosed herein. In some embodiments, a method for filling a feature disposed in a substrate includes (a) depositing a metal within the feature to a first predetermined thickness in a first process chamber; (b) depositing the metal within the feature to a second predetermined thickness in a second process chamber; (c) etching the metal deposited in (b) to remove an overhang of the metal at a top of the feature in a third process chamber different than the first and second process chambers; and (d) subsequent to (c), filling the feature with the metal in a fourth process chamber different than the first and third process chambers.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: March 16, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Roey Shaviv, Xikun Wang, Ismail Emesh, Jianxin Lei, Wenting Hou
  • Publication number: 20210043506
    Abstract: Methods and apparatus for forming an interconnect, including: depositing a first barrier layer upon a top surface of a via and a top surface of a trench; filling the via with a first metal, wherein the first metal completely fills the via and forms a metal layer within the trench; etching the metal layer within the trench to expose dielectric sidewalls of the trench, a top surface of the via, and a dielectric bottom of the trench; depositing a second barrier layer upon the dielectric sidewalls, top surface of the via, and the dielectric bottom of the trench; and filling the trench with a second metal different than the first metal.
    Type: Application
    Filed: October 10, 2019
    Publication date: February 11, 2021
    Inventors: Roey Shaviv, Ismail Emesh, Xikun Wang
  • Patent number: 10770346
    Abstract: Exemplary methods for removing cobalt material may include flowing a chlorine-containing precursor into a processing region of a semiconductor processing chamber. The methods may include forming a plasma of the chlorine-containing precursor to produce plasma effluents. The methods may also include contacting an exposed region of cobalt with the plasma effluents. The exposed region of cobalt may include an overhang of cobalt on a trench defined on a substrate. The plasma effluents may produce cobalt chloride at the overhang of cobalt. The methods may include flowing a nitrogen-containing precursor into the processing region of the semiconductor processing chamber. The methods may further include contacting the cobalt chloride with the nitrogen-containing precursor. The methods may also include recessing the overhang of cobalt.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Jianxin Lei, Nitin Ingle, Roey Shaviv
  • Publication number: 20200258744
    Abstract: A semiconductor device fabrication process includes forming gates on a substrate having a plurality of openings, each gate having a conducting layer a first metal and a gate dielectric layer of a first dielectric material, partially filling the openings with a second dielectric material, forming a first structure on the substrate in a processing system without breaking vacuum, depositing a third dielectric material over the first structure, and forming a planarized surface of the gates and a surface of the third dielectric material that is disposed over the first structure. The forming of the first structure includes forming trenches by removing second portions of the second dielectric material within each opening, forming recessed active regions in the trenches by partially filling the trenches with a second metal, forming a liner over each recessed active region, and forming a metal cap layer over each liner.
    Type: Application
    Filed: June 17, 2019
    Publication date: August 13, 2020
    Inventors: Gaurav THAREJA, Keyvan KASHEFIZADEH, Xikun WANG, Anchuan WANG, Sanjay NATARAJAN, Sean M. SEUTTER, Dong Wu
  • Publication number: 20200251340
    Abstract: Methods and apparatus for filling a feature disposed in a substrate, including: depositing a first metal within the feature to a first predetermined thickness in a first process chamber; etching the first metal to remove a first portion of the metal at a top of the feature in a second process chamber different than the first process chamber to form an exposed surface of the first metal, and selectively depositing a second metal atop the exposed surface of the first metal within the feature to a second predetermined thickness in a third process chamber; wherein etching the first metal and selectively depositing a second metal are performed without oxygen contacting the top surface.
    Type: Application
    Filed: January 29, 2020
    Publication date: August 6, 2020
    Inventors: ROEY SHAVIV, AVGERINOS V. GELATOS, ISMAIL EMESH, XIKUN WANG, YU LEI
  • Patent number: 10727080
    Abstract: Methods are described herein for etching tantalum-containing films with various potential additives while still retaining other desirable patterned substrate portions. The methods include exposing a tantalum-containing film to a chlorine-containing precursor (e.g. Cl2) with a concurrent plasma. The plasma-excited chlorine-containing precursor selectively etches the tantalum-containing film and other industrially-desirable additives. Chlorine is then removed from the substrate processing region. A hydrogen-containing precursor (e.g. H2) is delivered to the substrate processing region (also with plasma excitation) to produce a relatively even and residue-free tantalum-containing surface. The methods presented remove tantalum while retaining materials elsewhere on the patterned substrate.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: July 28, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Naomi Yoshida, Soumendra N. Barman, Nitin K. Ingle
  • Patent number: 10699953
    Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure provide an electronic device having a liner that is selectively removable when compared to conductive lines. The liner may be selectively removed by utilizing one or more of a base (e.g. sodium hydroxide) and hydrogen peroxide.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: June 30, 2020
    Assignee: Micromaterials LLC
    Inventors: Amrita B. Mullick, Nitin K. Ingle, Xikun Wang, Regina Freed, Uday Mitra, Ho-yung David Hwang
  • Patent number: 10658161
    Abstract: In-situ low pressure chamber cleans and gas nozzle apparatus for plasma processing systems employing in-situ deposited chamber coatings. Certain chamber clean embodiments for conductor etch applications include an NF3-based plasma clean performed at pressures below 30 mT to remove in-situ deposited SiOx coatings from interior surfaces of a gas nozzle hole. Embodiments include a gas nozzle with bottom holes dimensioned sufficiently small to reduce or prevent the in-situ deposited chamber coatings from building up a SiOx deposits on interior surfaces of a nozzle hole.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: May 19, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Andrew Nguyen, Changhun Lee, Xiaoming He, Meihua Shen
  • Publication number: 20200090912
    Abstract: Semiconductor processing systems are described, which may include a substrate support assembly having a substrate support surface. Exemplary substrate support assemblies may include a ceramic heater defining the substrate support surface. The assemblies may include a ground plate on which the ceramic heater is seated. The assemblies may include a stem with which the ground plate is coupled. The assemblies may include an electrode embedded within the ceramic heater at a depth from the substrate support surface. The chambers or systems may also include an RF match configured to provide an AC current and an RF power through the stem to the electrode. The RF match may be coupled with the substrate support assembly along the stem. The substrate support assembly and RF match may be vertically translatable within the semiconductor processing system.
    Type: Application
    Filed: September 17, 2018
    Publication date: March 19, 2020
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Soonam Park, David Benjaminson, Xikun Wang, Dmitry Lubomirsky
  • Publication number: 20190378756
    Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure provide an electronic device having a liner that is selectively removable when compared to conductive lines. The liner may be selectively removed by utilizing one or more of a base (e.g. sodium hydroxide) and hydrogen peroxide.
    Type: Application
    Filed: May 29, 2019
    Publication date: December 12, 2019
    Inventors: Amrita B. Mullick, Nitin K. Ingle, Xikun Wang, Regina Freed, Uday Mitra, Ho-yung David Hwang
  • Patent number: 10465294
    Abstract: Methods are described herein for etching metal films which are difficult to volatize. The methods include exposing a metal film to a chlorine-containing precursor (e.g. Cl2). Chlorine is then removed from the substrate processing region. A carbon-and-nitrogen-containing precursor (e.g. TMEDA) is delivered to the substrate processing region to form volatile metal complexes which desorb from the surface of the metal film. The methods presented remove metal while very slowly removing the other exposed materials. A thin metal oxide layer may be present on the surface of the metal layer, in which case a local plasma from hydrogen may be used to remove the oxygen or amorphize the near surface region, which has been found to increase the overall etch rate.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: November 5, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Jie Liu, Anchuan Wang, Nitin K. Ingle, Jeffrey W. Anthis, Benjamin Schmiege
  • Publication number: 20190295826
    Abstract: In-situ low pressure chamber cleans and gas nozzle apparatus for plasma processing systems employing in-situ deposited chamber coatings. Certain chamber clean embodiments for conductor etch applications include an NF3-based plasma clean performed at pressures below 30 mT to remove in-situ deposited SiOx coatings from interior surfaces of a gas nozzle hole. Embodiments include a gas nozzle with bottom holes dimensioned sufficiently small to reduce or prevent the in-situ deposited chamber coatings from building up a SiOx deposits on interior surfaces of a nozzle hole.
    Type: Application
    Filed: June 11, 2019
    Publication date: September 26, 2019
    Inventors: Xikun Wang, Andrew Nguyen, Changhun Lee, Xiaoming He, Meihua Shen
  • Publication number: 20190122923
    Abstract: Exemplary methods for removing cobalt material may include flowing a chlorine-containing precursor into a processing region of a semiconductor processing chamber. The methods may include forming a plasma of the chlorine-containing precursor to produce plasma effluents. The methods may also include contacting an exposed region of cobalt with the plasma effluents. The exposed region of cobalt may include an overhang of cobalt on a trench defined on a substrate. The plasma effluents may produce cobalt chloride at the overhang of cobalt. The methods may include flowing a nitrogen-containing precursor into the processing region of the semiconductor processing chamber. The methods may further include contacting the cobalt chloride with the nitrogen-containing precursor. The methods may also include recessing the overhang of cobalt.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 25, 2019
    Applicant: Applied Materials, Inc.
    Inventors: Xikun Wang, Jianxin Lei, Nitin Ingle, Roey Shaviv
  • Patent number: 10256112
    Abstract: Exemplary methods for removing tungsten-containing material may include flowing a chlorine-containing precursor into a processing region of a semiconductor processing chamber. The methods may also include flowing methane into the processing region of the semiconductor processing chamber. The methods may include forming a plasma from the chlorine-containing precursor and the methane to produce plasma effluents. The methods may also include contacting a substrate with the plasma effluents. The substrate may include an exposed region of a tungsten-containing material. The plasma effluents may produce an oxychloride of tungsten. The methods may also include recessing the exposed region of the tungsten-containing material.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: April 9, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Nitin Ingle