Abstract: Methods, systems, and devices for logical-to-physical (L2P) mapping compression techniques are described. A memory system may use an L2P mapping to map logical addresses to physical addresses of the memory system. The L2P mapping may be a hierarchical L2P mapping divided into multiple levels or subsets that are used to identify a physical address corresponding to a logical address. The memory system may write data to a set of physical addresses that are consecutively indexed and may set a flag in an entry of a second-level of the L2P mapping (e.g., of a three-level L2P mapping) to indicate that the entry is associated with a starting physical address of the consecutively indexed physical addresses. The memory system may subsequently read the data starting at the starting physical address based on the flag (e.g., bypassing reading an entry of a lowest-level of the L2P mapping to determine the physical address).

Abstract: A first communication device receives an analog receive signal via a communication medium. An ADC of the first communication device converts the analog receive signal to a digital receive signal. Logic circuitry of the first communication device detects a plurality of timing signals from a second communication device based on analyzing the digital receive signal. The logic circuitry adjusts a sampling phase of the ADC in connection with at least some of the timing signals so that the ADC is using different sampling phases when different ones of the timing signals are detected. The logic circuitry determines timing information based on the detection of the plurality of timing signals when the ADC is using different sampling phases when different ones of the timing signals are detected. The first communication device determines a time of flight between the first communication device and the second communication device based on the timing information.

Abstract: The present disclosure provides an autonomous cleaning device, including: a mobile platform, configured to move autonomously on an operation surface; and a cleaning module, disposed on the mobile platform, and including: a wet cleaning module, configured to clean at least part of the operation surface in a wet cleaning mode; a lifting structure, connected to the wet cleaning module and configured to enable the wet cleaning module to move upwards or downwards relative to the mobile platform; and a driving assembly, connected to the lifting structure and configured to provide power for lifting of the lifting structure, and/or, to provide a cleaning liquid for the wet cleaning module.

Abstract: An automatic cleaning apparatus that comprises a mobile platform configured to move automatically on an operation surface; a cleaning module disposed on the mobile platform and comprising: a dry-cleaning module configured to clean at least a part of the operation surface by means of dry cleaning; a wet-cleaning module configured to clean at least a part of the operation surface by means of wet cleaning; and a lifting and lowering structure connected to the dry-cleaning module or the wet-cleaning module and configured to enable the dry-cleaning module or the wet-cleaning module to move vertically relative to the mobile platform. The wet-cleaning module comprises: a cleaning head for cleaning the operation surface, and a driving unit for driving the cleaning head to reciprocate along a target surface, and the target surface is a part of the operation surface.

Abstract: Integration of self-biased magnetic circulators with microwave devices is disclosed herein. In microwave and other high-frequency radio frequency (RF) applications, a magnetic circulator can be implemented with a smaller permanent magnet. Aspects disclosed herein include a process flow for producing a self-biased circulator in an integrated circuit chip. In this regard, a magnetic circulator junction can be fabricated on an active layer of a semiconductor wafer. A deep pocket or cavity is formed in an insulating substrate under the active layer. This cavity is then filled with a ferromagnetic material such that the circulator junction is self-biased within the integrated circuit chip, eliminating the need for an external magnet. The self-biased circulator provides high isolation between ports in a smaller integrated circuit.

Abstract: A passive magnetic device (PMD) has a base electrode, a multi-port signal structure (MPSS), and a substrate therebetween. The MPSS has a central plate residing in a second plane and at least two port tabs spaced apart from one another and extending from the central plate. The substrate has a central portion that defines a mesh structure between the base electrode and the central plate of the multi-port signal structure. A plurality of magnetic pillars are provided within the mesh structure, wherein each of the plurality of the magnetic pillars are spaced apart from one another and surrounded by a corresponding portion of the mesh structure. The PMD may provide a magnetically self-biased device that may be used as a radio frequency (RF) circulator, an RF isolator, and the like.

Abstract: Fabricating high efficiency, high linearity N-polar gallium-nitride (GaN) transistors by selective area regrowth is disclosed. A demand for high efficiency components with highly linear performance characteristics for radio frequency (RF) systems has increased development of GaN transistors and, in particular, aluminum-gallium-nitride (AlGaN)/GaN high electron mobility transistor (HEMT) devices. A method of fabricating a high efficiency, high linearity N-polar HEMT device includes employing a selective area regrowth method for forming a HEMT structure on the Nitrogen-face (N-face) of a GaN buffer, a natural high composition AlGaN/AlN back barrier for carrier confinement, a thick undoped GaN layer on the access areas to eliminate surface dispersion, and a high access area width to channel width ratio for improved linearity. A problem of impurities on the GaN buffer surface prior to regrowth creating a leakage path is avoided by intentional silicon (Si) doping in the HEMT structure.

Abstract: Integration of self-biased magnetic circulators with microwave devices is disclosed herein. In microwave and other high-frequency radio frequency (RF) applications, a magnetic circulator can be implemented with a smaller permanent magnet. Aspects disclosed herein include a process flow for producing a self-biased circulator in an integrated circuit chip. In this regard, a magnetic circulator junction can be fabricated on an active layer of a semiconductor wafer. A deep pocket or cavity is formed in an insulating substrate under the active layer. This cavity is then filled with a ferromagnetic material such that the circulator junction is self-biased within the integrated circuit chip, eliminating the need for an external magnet. The self-biased circulator provides high isolation between ports in a smaller integrated circuit.

Abstract: A passive magnetic device (PMD) has a base electrode, a multi-port signal structure (MPSS), and a substrate therebetween. The MPSS has a central plate residing in a second plane and at least two port tabs spaced apart from one another and extending from the central plate. The substrate has a central portion that defines a mesh structure between the base electrode and the central plate of the multi-port signal structure. A plurality of magnetic pillars are provided within the mesh structure, wherein each of the plurality of the magnetic pillars are spaced apart from one another and surrounded by a corresponding portion of the mesh structure. The PMD may provide a magnetically self-biased device that may be used as a radio frequency (RF) circulator, an RF isolator, and the like.

Abstract: A passive magnetic device (PMD) has a base electrode, a multi-port signal structure (MPSS), and a substrate therebetween. The MPSS has a central plate residing in a second plane and at least two port tabs spaced apart from one another and extending from the central plate. The substrate has a central portion that defines a mesh structure between the base electrode and the central plate of the multi-port signal structure. A plurality of magnetic pillars are provided within the mesh structure, wherein each of the plurality of the magnetic pillars are spaced apart from one another and surrounded by a corresponding portion of the mesh structure. The PMD may provide a magnetically self-biased device that may be used as a radio frequency (RF) circulator, an RF isolator, and the like.

Abstract: The invention provides a pan-tilt quick locking device, comprising a locking ring and a pan-tilt connecting device capable of generating relative forward and backward sliding with the locking ring along an inner cavity of the locking ring via a slide rail mechanism, and the pan-tilt connecting device locking the pan-tilt connecting device or loosening the pan-tilt connecting device via the relative sliding in the inner cavity of the locking ring. The pan-tilt quick locking device is structurally compact, has a small volume, can operate in a relatively small space, is simple to operate overall, and is convenient to use.

Abstract: A precursor cell for a transistor having a foundation structure, a mask structure, and a gallium nitride (GaN) PN structure is provided. The mask structure is provided over the foundation structure to expose a first area of a top surface of the foundation structure. The GaN PN structure resides over the first area and at least a portion of the mask structure and has a continuous crystalline structure with no internal regrowth interfaces. The GaN PN structure comprises a drift region over the first area, a control region laterally adjacent the drift region, and a PN junction formed between the drift region and the control region. Since the drift region and the control region form the PN junction having no internal regrowth interfaces, the GaN PN structure has a continuous crystalline structure with reduced regrowth related defects at the interface of the drift region and the control region.

Abstract: The present disclosure relates to a process of forming a semiconductor device with a high thermal conductivity substrate. According to an exemplary process, a semiconductor precursor including a substrate structure, a buffer structure over the substrate structure, and a channel structure over the buffer structure is provided. The channel structure has a first channel surface and a second channel surface, which is opposite the first channel surface, adjacent to the buffer structure, and has a first polarity. Next, a high thermal conductivity substrate with a thermal conductivity greater than 400 W/mK is formed over the first channel surface. A heat sink carrier is then provided over the high thermal conductivity substrate. Next, the substrate structure and the buffer structure are removed to provide a thermally enhanced semiconductor device with an exposed surface, which has the first polarity.

Abstract: A passive magnetic device (PMD) has a base electrode, a multi-port signal structure (MPSS), and a substrate therebetween. The MPSS has a central plate residing in a second plane and at least two port tabs spaced apart from one another and extending from the central plate. The substrate has a central portion that defines a mesh structure between the base electrode and the central plate of the multi-port signal structure. A plurality of magnetic pillars are provided within the mesh structure, wherein each of the plurality of the magnetic pillars are spaced apart from one another and surrounded by a corresponding portion of the mesh structure. The PMD may provide a magnetically self-biased device that may be used as a radio frequency (RF) circulator, an RF isolator, and the like.

Abstract: The present disclosure relates to a process of forming a high thermal conductivity substrate for an Aluminum/Gallium/Indium (III)-Nitride semiconductor device. According to an exemplary process, a semiconductor precursor including a substrate structure and a buffer structure is provided. The buffer structure is formed over the substrate structure and has a first buffer surface and a second buffer surface. Herein, the second buffer surface is adjacent to the substrate structure and the first buffer surface is opposite the second buffer surface. Next, a high thermal conductivity substrate with a thermal conductivity greater than 400 W/mK is formed over the first buffer surface. A heat sink carrier is then provided over the high thermal conductivity substrate. The substrate structure is then substantially removed to provide a thermally enhanced precursor for the III-Nitride semiconductor device.

Abstract: A precursor cell for a transistor having a foundation structure, a mask structure, and a gallium nitride (GaN) PN structure is provided. The mask structure is provided over the foundation structure to expose a first area of a top surface of the foundation structure. The GaN PN structure resides over the first area and at least a portion of the mask structure and has a continuous crystalline structure with no internal regrowth interfaces. The GaN PN structure comprises a drift region over the first area, a control region laterally adjacent the drift region, and a PN junction formed between the drift region and the control region. Since the drift region and the control region form the PN junction having no internal regrowth interfaces, the GaN PN structure has a continuous crystalline structure with reduced regrowth related defects at the interface of the drift region and the control region.

Abstract: A semiconductor device includes a substrate, a relaxation layer, a channel layer, a polarization compensation layer, and a barrier layer. The relaxation layer is over the substrate and configured to reduce a total strain of the semiconductor device. The channel layer is over the relaxation layer. The polarization compensation layer is between the relaxation layer and the channel layer and configured to reduce a polarization between the relaxation layer and the channel layer. The barrier layer is over the relaxation layer and configured to polarize a junction between the barrier layer and the channel layer to induce a two-dimensional electron gas in the channel layer.

Abstract: A semiconductor device includes a substrate, a relaxation layer, a channel layer, a polarization compensation layer, and a barrier layer. The relaxation layer is over the substrate and configured to reduce a total strain of the semiconductor device. The channel layer is over the relaxation layer. The polarization compensation layer is between the relaxation layer and the channel layer and configured to reduce a polarization between the relaxation layer and the channel layer. The barrier layer is over the relaxation layer and configured to polarize a junction between the barrier layer and the channel layer to induce a two-dimensional electron gas in the channel layer.

Abstract: The present disclosure relates to a process of forming a semiconductor device with a high thermal conductivity substrate. According to an exemplary process, a semiconductor precursor including a substrate structure, a buffer structure over the substrate structure, and a channel structure over the buffer structure is provided. The channel structure has a first channel surface and a second channel surface, which is opposite the first channel surface, adjacent to the buffer structure, and has a first polarity. Next, a high thermal conductivity substrate with a thermal conductivity greater than 400 W/mK is formed over the first channel surface. A heat sink carrier is then provided over the high thermal conductivity substrate. Next, the substrate structure and the buffer structure are removed to provide a thermally enhanced semiconductor device with an exposed surface, which has the first polarity.

Abstract: The present disclosure relates to a process of forming a high thermal conductivity substrate for an Aluminum/Gallium/Indium (III)-Nitride semiconductor device. According to an exemplary process, a semiconductor precursor including a substrate structure and a buffer structure is provided. The buffer structure is formed over the substrate structure and has a first buffer surface and a second buffer surface. Herein, the second buffer surface is adjacent to the substrate structure and the first buffer surface is opposite the second buffer surface. Next, a high thermal conductivity substrate with a thermal conductivity greater than 400 W/mK is formed over the first buffer surface. A heat sink carrier is then provided over the high thermal conductivity substrate. The substrate structure is then substantially removed to provide a thermally enhanced precursor for the III-Nitride semiconductor device.