Patents by Inventor Xinguo WU

Xinguo WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240112623
    Abstract: A display substrate, comprising a base substrate and a scan drive control circuit which is disposed in a non-display area of the base substrate. The scan drive control circuit comprises an input circuit, an output control circuit, and an output circuit. The output control circuit is connected to the input circuit and the output circuit. The output control circuit comprises a first node control capacitor and a second node control capacitor. The length of the first node control capacitor in a first direction LC1k, the length of the second node control capacitor in the first direction LC2k and the length of the scan drive control circuit in the first direction LY satisfy the following formula: L C ? 1 ? k L Y < L C ? 2 ? k L Y ; L C ? 1 ? k L Y < 0.2 .
    Type: Application
    Filed: July 8, 2022
    Publication date: April 4, 2024
    Inventors: Miao LIU, Xueguang HAO, Jingbo XU, Xing YAO, Jingquan WANG, Xinyin WU, Xinguo LI, Zhichong WANG
  • Publication number: 20230350255
    Abstract: The present disclosure provides a display substrate and a display panel, and belongs to the field of display technology. The present display substrate includes a display region and a peripheral region surrounding the display region; the display substrate includes: a base substrate; a plurality of insulating layers sequentially arranged along a direction away from the base substrate; wherein each of the plurality of insulating layers is located in the display region and the peripheral region; one or more protrusion structures arranged between at least two adjacent ones of the plurality of insulating layers and in the peripheral region.
    Type: Application
    Filed: August 18, 2021
    Publication date: November 2, 2023
    Inventors: Hong LIU, Jingyi XU, Xiaochun XU, Jiantao LIU, Wanzhi CHEN, Chengfu XU, Bo LI, Yongqiang ZHANG, Peng LIU, Ruirui HAO, Yu FENG, Xinguo WU
  • Patent number: 11762489
    Abstract: An array substrate includes a base substrate; a common electrode layer including a plurality of common electrodes, arranged in an array, a part of which being also used as first touch electrodes and another part of which being also used as second touch electrodes; a first conductive layer including a plurality of electrode connecting lines, each row of first touch electrodes being coupled serially by at least one electrode connecting line; and a second conductive layer including a plurality of first touch signal lines and a plurality of second touch signal lines, each row of first touch electrodes being coupled to at least one first touch signal line which is configured to transmit a first touch signal; each second touch electrode or each column of second touch electrodes being coupled to at least one second touch signal line which is configured to transmit a second touch signal.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: September 19, 2023
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhixuan Guo, Fengguo Wang, Yezhou Fang, Xinguo Wu, Hong Liu, Shiyu Zhang, Lei Li
  • Publication number: 20230118501
    Abstract: An array substrate includes a base substrate; a common electrode layer including a plurality of common electrodes, arranged in an array, a part of which being also used as first touch electrodes and another part of which being also used as second touch electrodes; a first conductive layer including a plurality of electrode connecting lines, each row of first touch electrodes being coupled serially by at least one electrode connecting line; and a second conductive layer including a plurality of first touch signal lines and a plurality of second touch signal lines, each row of first touch electrodes being coupled to at least one first touch signal line which is configured to transmit a first touch signal; each second touch electrode or each column of second touch electrodes being coupled to at least one second touch signal line which is configured to transmit a second touch signal.
    Type: Application
    Filed: December 13, 2019
    Publication date: April 20, 2023
    Inventors: Zhixuan GUO, Fengguo WANG, Yezhou FANG, Xinguo WU, Hong LIU, Shiyu ZHANG, Lei LI
  • Publication number: 20230018774
    Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and a plurality of pixels arranged on the base substrate, each pixel includes a plurality of sub-pixels, and each sub-pixel includes a first active layer, a first gate insulation layer, a gate electrode, a second gate insulation layer, a second active layer, a first insulation layer, a source electrode and a drain electrode laminated one on another. The source electrode is connected with the first active layer through a via hole penetrating through the first insulation layer, the second gate insulation layer and the first gate insulation layer, and the source electrode and the drain electrode are connected with the second active layer through a via hole penetrating through the first insulation layer.
    Type: Application
    Filed: March 10, 2021
    Publication date: January 19, 2023
    Inventors: Xinguo WU, Fengguo WANG, Hong LIU, Yu FENG, Liang TIAN, Haidong WANG, Shicheng SONG
  • Publication number: 20220252926
    Abstract: Embodiments of the present disclosure provide a display substrate and a display panel. The display substrate has a light-transmissive region and a light-shielding region, and the light-shielding region includes a main support region and a secondary support region. The display substrate includes a substrate, an alignment layer on the substrate, and a convex structure on the alignment layer. The convex structure is on a side of the alignment layer distal to the substrate and at least in the main support region, and a distance from a surface of the convex structure distal to the substrate to the substrate is greater than a distance from a surface of the alignment layer distal to the substrate to the substrate.
    Type: Application
    Filed: January 21, 2021
    Publication date: August 11, 2022
    Inventors: Kai LI, Feng LI, Yezhou FANG, Xinguo WU, Lei YAO, Chenglong WANG, Zhixuan GUO, Lei YAN
  • Patent number: 11366534
    Abstract: A touch substrate and a manufacturing method thereof, and an in-cell touch panel. The touch substrate includes: a base substrate, a first insulation layer, a transmission line and a common electrode. The first insulation layer is on the base substrate, and a groove extending in a first direction is in the first insulation layer; the transmission line is in the groove and is configured to transmit an electrical signal; the common electrode overlaps with the transmission line and is electrically connected with the transmission line.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: June 21, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Zifeng Wang, Fengguo Wang, Dawei Shi, Bo Ma, Hong Liu, Xinguo Wu, Wentao Wang, Lina Wang
  • Patent number: 11362115
    Abstract: The present disclosure relates to the technical field of display. Disclosed are an array substrate and a preparation method therefor, and a display panel and a display device. The array substrate includes: a substrate; multiple gate lines, wherein the gate lines are located on the substrate, and extend along a first direction; multiple data lines, wherein the data lines are located on the substrate, and extend along a second direction, and the gate lines and the data lines intersect to define multiple pixel areas; and a touch-control electrode wiring wherein the touch-control electrode wiring has the same direction as that of the gate lines, and is arranged insulated from the gate lines on a different layer, and the orthographic projection of the touch-control electrode wiring on the substrate at least has an overlapping area with the orthographic projection of part of the gate lines on the substrate.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: June 14, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhixuan Guo, Fengguo Wang, Yezhou Fang, Feng Li, Xinguo Wu, Hong Liu, Zifeng Wang, Lei Li, Kai Li, Liang Tian, Jing Zhao, Zhengkui Wang, Bo Ma, Haiqin Liang, Peng Liu
  • Patent number: 11347334
    Abstract: An array substrate, a method for fabricating the same, and a display device are provided. The array substrate includes: a base substrate; touch electrode wiring including a first conductive layer and a second conductive layer, where the first conductive layer is between the base substrate and the second conductive layer, the second conductive layer includes at least one first via hole to expose the first conductive layer, and the first conductive layer has a higher electrical conductivity than that of the second conductive layer; a planarization layer on the second conductive layer, where the planarization layer includes at least one first touch electrode contact hole; and touch electrode on the planarization layer, where the touch electrode is connected with the first conductive layer through the first touch electrode contact hole and the first via hole.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: May 31, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Cenhong Duan, Dawei Shi, Fengguo Wang, Feng Li, Hong Liu, Xinguo Wu, Lu Yang, Wentao Wang, Zifeng Wang, Bo Ma, Yuanbo Li, Zhixuan Guo, Jing Zhao, Haiqin Liang
  • Patent number: 11342460
    Abstract: A thin film transistor, a method for fabricating the same, an array substrate, a display panel, and a display device are provided. The thin film transistor includes a substrate, and an active layer on the substrate, wherein the active layer includes a poly-silicon layer and has a channel region and two electrode connection regions respectively on two sides of the channel region, and the channel region includes a plurality of lightly drain doping segments, which are spaced apart along from one of the electrode connection regions to the other electrode connection region, and channel segments located between the lightly drain doping segments.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: May 24, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhixuan Guo, Fengguo Wang, Yezhou Fang, Xinguo Wu, Hong Liu, Kai Li, Liang Tian, Shiyu Zhang
  • Patent number: 11237657
    Abstract: Embodiments of the present disclosure provide an array substrate, a method of manufacturing the array substrate, a display panel and a display apparatus. The array substrate includes: a substrate; a touch pad disposed on a side of the substrate; a first planarization layer disposed on a side of the touch pad facing away from the substrate; a first passivation layer disposed on a side of the first planarization layer facing away from the touch pad; a touch electrode layer disposed on a side of the first passivation layer facing away from the first planarization layer; and a first via hole sequentially passing through at least the first planarization layer and the first passivation layer. The touch electrode layer is electrically connected to the touch pad through the first via hole.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: February 1, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chenglong Wang, Yezhou Fang, Feng Li, Xinguo Wu, Xiaogang Zhu, Guojiang Yu
  • Patent number: 11231800
    Abstract: A touch substrate includes a base, a plurality of touch electrodes arranged in an array on the base, and a plurality of signal lines disposed on a side of the plurality of touch electrodes proximate to or away from the base. The plurality of signal lines include a plurality of touch lines and a plurality of dummy touch lines. At least one of the plurality of touch electrodes is coupled to at least one of the plurality of touch lines. The at least one touch line is configured to transmit touch signals. The at least one touch electrode is coupled to at least one of the plurality of dummy touch lines.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: January 25, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinguo Wu, Fengguo Wang, Zhixuan Guo, Hong Liu, Bo Ma, Yu Feng, Shicheng Song
  • Patent number: 11222908
    Abstract: An array substrate is provided. The array substrate includes a base, a first electrode and a second electrode which are on the base and a touch line on the base, both the first electrode and the second electrode are configured to transmit a display signal, the touch line is configured to transmit a touch signal; the first electrode and the touch line are respectively in different layers, and an orthographic projection of the first electrode on the base at least partially overlaps with an orthographic projection of the touch line on the base. A preparation method of the array substrate and a touch display panel are further provided.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: January 11, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinguo Wu, Fengguo Wang, Dawei Shi, Hong Liu, Zifeng Wang, Feng Li, Bo Ma, Zhixuan Guo, Yuanbo Li, Jing Zhao, Cenhong Duan, Haiqin Liang
  • Publication number: 20210373689
    Abstract: An array substrate, a method for fabricating the same, and a display device are provided. The array substrate includes: a base substrate; touch electrode wiring including a first conductive layer and a second conductive layer, where the first conductive layer is between the base substrate and the second conductive layer, the second conductive layer includes at least one first via hole to expose the first conductive layer, and the first conductive layer has a higher electrical conductivity than that of the second conductive layer; a planarization layer on the second conductive layer, where the planarization layer includes at least one first touch electrode contact hole; and touch electrode on the planarization layer, where the touch electrode is connected with the first conductive layer through the first touch electrode contact hole and the first via hole.
    Type: Application
    Filed: December 4, 2018
    Publication date: December 2, 2021
    Inventors: Cenhong DUAN, Dawei SHI, Fengguo WANG, Feng LI, Hong LIU, Xinguo WU, Lu YANG, Wentao WANG, Zifeng WANG, Bo MA, Yuanbo LI, Zhixuan GUO, Jing ZHAO, Haiqin LIANG
  • Patent number: 11163204
    Abstract: An array substrate, a display panel including the same, and a display device are provided. The array substrate includes: a base substrate and a planarization layer on the base substrate. A first conductive layer is disposed on a side of the planarization layer away from the base substrate. A first passivation layer is disposed on a side of the first conductive layer and the side of the planarization layer not being covered by the first conductive layer, away from the base substrate, and provided with a plurality of stress release openings. An insulating layer is disposed in the stress release openings and on a side of the first passivation layer away from the planarization layer. A second conductive layer is disposed on a side of the insulating layer away from the planarization layer.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: November 2, 2021
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Hong Liu, Yezhou Fang, Fengguo Wang, Xinguo Wu, Zhixuan Guo, Haidong Wang, Liang Tian, Kai Li, Bo Ma
  • Publication number: 20210333968
    Abstract: The present disclosure provides an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a display area and a peripheral circuit area. The array substrate further includes a plurality of touch electrodes located in the display area; a plurality of touch signal lines connecting the plurality of touch electrodes to the peripheral circuit area; a plurality of first conductor lines extending in a same direction as the plurality of touch signal lines; and a plurality of second conductor lines extending in a different direction from the plurality of touch signal lines.
    Type: Application
    Filed: November 30, 2018
    Publication date: October 28, 2021
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinguo WU, Fengguo WANG, Dawei SHI, Hong LIU, Zifeng WANG, Feng LI, Bo MA, Zhixuan GUO, Yuanbo LI, Cenhong DUAN, Jing ZHAO
  • Patent number: 11127885
    Abstract: Disclosed are an array substrate, a display panel and a display device. The array substrate includes: a base substrate provided with a bonding region for packaging a chip on film, and a first electrode structure, an interlayer dielectric layer, a second electrode structure and a third electrode structure sequentially arranged on the base substrate, the orthographic projections of the first electrode structure, the interlayer dielectric layer, the second electrode structure and the third electrode structure on the base substrate being located in the bonding region. The array substrate further includes protection layers located between the first portion of the second electrode structure and a third electrode and between the second portion of the second electrode structure and the third electrode respectively; and the protection layers cover the side end face of the first portion and the side end face of the second end surface.
    Type: Grant
    Filed: March 22, 2020
    Date of Patent: September 21, 2021
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Hong Liu, Yezhou Fang, Fengguo Wang, Xinguo Wu, Zhixuan Guo, Haidong Wang, Liang Tian, Dong Zhang, Yue Yang, Yulin Cui
  • Publication number: 20210223893
    Abstract: A touch substrate and a manufacturing method thereof, and an in-cell touch panel, The touch substrate includes: a base substrate, a first insulation layer, a transmission line and a common electrode. The first insulation layer is on the base substrate, and a groove extending in a first direction is in the first insulation layer; the transmission line is in the groove and is configured to transmit an electrical signal; the common electrode overlaps with the transmission line and is electrically connected with the transmission line.
    Type: Application
    Filed: March 5, 2018
    Publication date: July 22, 2021
    Inventors: Zifeng WANG, Fengguo WANG, Dawei SHI, Bo MA, Hong LIU, Xinguo WU, Wentao WANG, Lina WANG
  • Publication number: 20210157185
    Abstract: An array substrate, a display panel including the same, and a display device are provided. The array substrate includes: a base substrate and a planarization layer on the base substrate. A first conductive layer is disposed on a side of the planarization layer away from the base substrate. A first passivation layer is disposed on a side of the first conductive layer and the side of the planarization layer not being covered by the first conductive layer, away from the base substrate, and provided with a plurality of stress release openings. An insulating layer is disposed in the stress release openings and on a side of the first passivation layer away from the planarization layer. A second conductive layer is disposed on a side of the insulating layer away from the planarization layer.
    Type: Application
    Filed: March 6, 2020
    Publication date: May 27, 2021
    Inventors: Hong LIU, Yezhou FANG, Fengguo WANG, Xinguo WU, Zhixuan GUO, Haidong WANG, Liang TIAN, Kai LI, Bo MA
  • Publication number: 20210159364
    Abstract: Disclosed are an array substrate, a display panel and a display device. The array substrate includes: a base substrate provided with a bonding region for packaging a chip on film, and a first electrode structure, an interlayer dielectric layer, a second electrode structure and a third electrode structure sequentially arranged on the base substrate, the orthographic projections of the first electrode structure, the interlayer dielectric layer, the second electrode structure and the third electrode structure on the base substrate being located in the bonding region. The array substrate further includes protection layers located between the first portion of the second electrode structure and a third electrode and between the second portion of the second electrode structure and the third electrode respectively; and the protection layers cover the side end face of the first portion and the side end face of the second end surface.
    Type: Application
    Filed: March 22, 2020
    Publication date: May 27, 2021
    Inventors: Hong LIU, Yezhou Fang, Fengguo Wang, Xinguo Wu, Zhixuan Guo, Haidong Wang, Liang Tian, Dong Zhang, Yue Yang, Yulin Cui