Abstract: A current test circuit can include a sampling resister array with a control end connected with a main control component, a first end is connected with a power conversion circuit, and a second end configured to be connected with a component to be tested. The sampling resistor array includes at least two sampling branches, each having an analog switch and a sampling resistor connected serially. In the test, the main control component can generate a control signal according to the operating state of the component and gate at least one sampling branch of the sampling resistor array through the control signal, obtain voltage values at two ends of the sampling resistor array through a voltage test assembly, and determine the current of the component according to the voltage values at two ends of the sampling resistor array and resistance values of the sampling resistor array.

Abstract: A test fixture includes a signal test board, a circuit routing, and a branch routing. The signal test board includes a first surface and a second surface. The first surface has a first pin and a test point. The second surface has a second pin. The circuit routing is located in the signal test board and configured to connect the first pin and a corresponding second pin. A portion of the circuit routing includes an upper routing connected with one first pin, a lower routing connected with one second pin, and a via-hole routing connected with two ends of the upper routing and the lower routing. One end, connected with the via-hole routing, of the upper routing is located in a projection area of the corresponding test point. The branch routing is located in the signal test board and configured to connect the test point with a corresponding upper routing.

Abstract: The present disclosure provides a method, device and system for testing memory devices. The testing method includes: receiving a test instruction, the test instruction being used to characterize a model of a memory device to be tested that is connected to a test platform; selecting, according to the test instruction, a testing method corresponding to the model of the memory device to be tested from a plurality of pre-stored testing methods as a target testing method; and executing the target testing method to test the memory device to be tested.

Abstract: The present disclosure provides a method, device and system for testing memory devices. The testing method includes: receiving a test instruction, the test instruction being used to characterize a model of a memory device to be tested that is connected to a test platform; selecting, according to the test instruction, a testing method corresponding to the model of the memory device to be tested from a plurality of pre-stored testing methods as a target testing method; and executing the target testing method to test the memory device to be tested.

Abstract: A power consumption measurement assembly includes: at least two sampling modules respectively connected to a circuit to be measured in series; a gating module configured to gate one of the at least two sampling modules; an amplifying module configured to acquire and amplify a voltage signal across the gated sampling module; and a processing module connected to the gating module and the amplifying module and configured to: control and adjust the gated sampling module and an amplification of the amplifying module, calculate a power consumption value based on the amplified voltage signal and transmit the power consumption value.

Abstract: A current test circuit can include a sampling resister array with a control end connected with a main control component, a first end is connected with a power conversion circuit, and a second end configured to be connected with a component to be tested. The sampling resistor array includes at least two sampling branches, each having an analog switch and a sampling resistor connected serially. In the test, the main control component can generate a control signal according to the operating state of the component and gate at least one sampling branch of the sampling resistor array through the control signal, obtain voltage values at two ends of the sampling resistor array through a voltage test assembly, and determine the current of the component according to the voltage values at two ends of the sampling resistor array and resistance values of the sampling resistor array.

Abstract: A test fixture includes a signal test board, a circuit routing, and a branch routing. The signal test board includes a first surface and a second surface. The first surface has a first pin and a test point. The second surface has a second pin. The circuit routing is located in the signal test board and configured to connect the first pin and a corresponding second pin. A portion of the circuit routing includes an upper routing connected with one first pin, a lower routing connected with one second pin, and a via-hole routing connected with two ends of the upper routing and the lower routing. One end, connected with the via-hole routing, of the upper routing is located in a projection area of the corresponding test point. The branch routing is located in the signal test board and configured to connect the test point with a corresponding upper routing.