Patents by Inventor Ya-Hsin Huang

Ya-Hsin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11817496
    Abstract: A high voltage semiconductor device includes a semiconductor substrate, a gate structure, a drift region, a drain region, and an isolation structure. The gate structure is disposed on the semiconductor substrate. The drift region is disposed in the semiconductor substrate and partially disposed at a side of the gate structure. The drain region is disposed in the drift region. The isolation structure is at least partially disposed in the drift region. A part of the isolation structure is disposed between the drain region and the gate structure. The isolation structure includes a curved bottom surface.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: November 14, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ya-Hsin Huang, Chen-An Kuo, Po-Chun Lai
  • Publication number: 20230176330
    Abstract: An optical lens assembly includes a stop and includes, in order from an object side to an image side: a first lens, a second lens, a third lens, a fourth lens, a fifth lens, a sixth lens, and a seventh lens. A half of a maximum field of view of the optical lens assembly is HFOV, a distance from an image-side surface of the seventh lens to an image plane on an optical axis is BFL, a radius of curvature of an object-side surface of the fourth lens is R7, a radius of curvature of an image-side surface of the fourth lens is R8, and the following conditions are satisfied: 45<HFOV*BFL, and ?1032.81<R7*R8<?298.89.
    Type: Application
    Filed: February 23, 2022
    Publication date: June 8, 2023
    Inventors: Chi-Chung WANG, Ya-Hsin HUANG
  • Patent number: 11632492
    Abstract: An optical lens assembly includes, in order from the object side to the image side: a stop, a first lens element, a second lens element, a third lens element, and an infrared bandpass filter. An entrance pupil diameter of the optical lens assembly is EPD, a half of a maximum field of view of the optical lens assembly is HFOV, and the following condition is satisfied: 0.59<EPD/tan(HFOV)<1.33.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: April 18, 2023
    Assignee: NEWMAX TECHNOLOGY CO., LTD.
    Inventor: Ya-Hsin Huang
  • Publication number: 20230090332
    Abstract: An optical lens assembly includes, in order from the object side to the image side: a stop, a first lens element, a second lens element, a third lens element, and an infrared bandpass filter. An entrance pupil diameter of the optical lens assembly is EPD, a half of a maximum field of view of the optical lens assembly is HFOV, and the following condition is satisfied: 0.59<EPD/tan(HFOV)<1.33.
    Type: Application
    Filed: December 2, 2021
    Publication date: March 23, 2023
    Inventor: Ya-Hsin HUANG
  • Publication number: 20230052783
    Abstract: An infrared projection lens assembly includes, in order from the image side to the image source side: a stop, a first lens with positive refractive power, a second lens with refractive power, and a third lens with positive refractive power, wherein a radius of curvature of an image-side surface of the first lens is R1, half of a maximum view angle (field of view) of the infrared projection lens assembly is HFOV, a focal length of the infrared projection lens assembly is f, and following condition is satisfied: ?18.2<R1/(sin(HFOV)*f)<?1.53, so as to provide projected light of large angle.
    Type: Application
    Filed: October 18, 2021
    Publication date: February 16, 2023
    Inventors: Chun-Sheng LEE, Chi-Chang WANG, Ya-Hsin HUANG
  • Publication number: 20220334358
    Abstract: An optical lens system includes, in order from the object side to the image side: a first lens with negative refractive power, a stop, a second lens with positive refractive power, and a third lens with positive refractive power, wherein a distance from an object-side surface of the first lens to an image-side surface of the third lens along an optical axis is TD, a distance from the image-side surface of the third lens to an image plane along the optical axis is BFL, half of a maximum view angle (field of view) of the optical lens system is HFOV, an incident pupil aperture of the optical lens system is EPD, and following conditions are satisfied: 1.82<TD/BFL<3.8 and 3.10<sin(HFOV)/EPD<8.12.
    Type: Application
    Filed: July 14, 2021
    Publication date: October 20, 2022
    Inventor: Ya-Hsin Huang
  • Publication number: 20220052196
    Abstract: A high voltage semiconductor device includes a semiconductor substrate, a gate structure, a drift region, a drain region, and an isolation structure. The gate structure is disposed on the semiconductor substrate. The drift region is disposed in the semiconductor substrate and partially disposed at a side of the gate structure. The drain region is disposed in the drift region. The isolation structure is at least partially disposed in the drift region. A part of the isolation structure is disposed between the drain region and the gate structure. The isolation structure includes a curved bottom surface.
    Type: Application
    Filed: November 1, 2021
    Publication date: February 17, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ya-Hsin Huang, Chen-An Kuo, Po-Chun Lai
  • Patent number: 11195948
    Abstract: A high voltage semiconductor device includes a semiconductor substrate, a gate structure, a drift region, a drain region, and an isolation structure. The gate structure is disposed on the semiconductor substrate. The drift region is disposed in the semiconductor substrate and partially disposed at a side of the gate structure. The drain region is disposed in the drift region. The isolation structure is at least partially disposed in the drift region. A part of the isolation structure is disposed between the drain region and the gate structure. A top of the isolation structure includes a flat surface, and a bottom of the isolation structure includes a curved surface.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: December 7, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ya-Hsin Huang, Chen-An Kuo, Po-Chun Lai
  • Publication number: 20210351294
    Abstract: A high voltage semiconductor device includes a semiconductor substrate, a gate structure, a drift region, a drain region, and an isolation structure. The gate structure is disposed on the semiconductor substrate. The drift region is disposed in the semiconductor substrate and partially disposed at a side of the gate structure. The drain region is disposed in the drift region. The isolation structure is at least partially disposed in the drift region. A part of the isolation structure is disposed between the drain region and the gate structure. A top of the isolation structure includes a flat surface, and a bottom of the isolation structure includes a curved surface.
    Type: Application
    Filed: June 9, 2020
    Publication date: November 11, 2021
    Inventors: Ya-Hsin Huang, Chen-An Kuo, Po-Chun Lai