Patents by Inventor Ya-Wen Lin

Ya-Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240165170
    Abstract: The present invention provides a method for preventing and/or treating a NSAID-induced gastric ulcer. The method comprises administrating an effective amount of a lactic acid bacterium set to a subject. The lactic acid bacterium set comprises Lactobacillus plantarum GKD7 and Pediococcus acidilactici GKA4.
    Type: Application
    Filed: March 6, 2023
    Publication date: May 23, 2024
    Applicant: GRAPE KING BIO LTD.
    Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shin-Wei LIN, You-Shan TSAI, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, Zi-He WU, Yen-Po CHEN, Tzu Chun LIN
  • Patent number: 11989005
    Abstract: A system performs adaptive thermal ceiling control at runtime. The system includes computing circuits and a thermal management module. When detecting a runtime condition change that affects power consumption in the system, the thermal management module determines an adjustment to the thermal ceiling of a computing circuit, and increases the thermal ceiling of the computing circuit according to the adjustment.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: May 21, 2024
    Assignee: MediaTek Inc.
    Inventors: Bo-Jr Huang, Jia-Wei Fang, Jia-Ming Chen, Ya-Ting Chang, Chien-Yuan Lai, Cheng-Yuh Wu, Yi-Pin Lin, Wen-Wen Hsieh, Min-Shu Wang
  • Publication number: 20240157078
    Abstract: The present invention discloses a functional powder delivery device for precise locating and quantifying when delivering the functional powder to a site in need in a patient. Meanwhile, the device avoids negative pressure effect in the output catheter when airflow is switched, and thus prevents pollution or jam in the output catheter due to splash or back flow of body fluid. The device ensures tube clearance of the output catheter by maintaining continuous airflow, and a special design of airflow switch allows switching to airflow of large volume to carry the powder when required. Through continuous positive airflow in the tube system, the functional powder can be delivered to the site in need by a continuous powder flow, which overcomes drawbacks of the delivery devices in prior arts. In addition, the design of foot pedal can help endoscopist for a solo operation. The serial connecting parts can adapt for various size of bottles of various types of functional powder.
    Type: Application
    Filed: November 16, 2022
    Publication date: May 16, 2024
    Inventors: Xi-Zhang LIN, Ya-Wen SHIH, Sheng-Jye HWANG
  • Publication number: 20240139262
    Abstract: The present disclosure relates to a complex probiotic composition and a method for improving exercise performance of a subject with low intrinsic aerobic exercise capacity. The complex probiotic composition, which includes Lactobacillus rhamnosus GKLC1, Bifidobacterium lactis GKK24 and Clostridium butyricum GKB7, administered to the subject with the low intrinsic aerobic exercise capacity in a continuation period, can effectively reduce serum lactic acid and serum urea nitrogen after aerobic exercise, reduce proportion of offal fat and/or increase liver and muscle glycogen contents, thereby being as an effective ingredient for preparation of various compositions.
    Type: Application
    Filed: October 13, 2023
    Publication date: May 2, 2024
    Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shih-Wei LIN, Yen-Po CHEN, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, You-Shan TSAI, Zi-He WU
  • Patent number: 11968869
    Abstract: An electronic device includes a flexible substrate and a conductive wire. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. The metal portion includes a plurality of extending portions and a plurality of joint portions, and each of the openings is surrounded by two of the plurality of extending portions and two of the plurality of joint portions. A ratio of a sum of widths of the plurality of extending portions to a sum of widths of the plurality of joint portions is in a range from 0.8 to 1.2.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: April 23, 2024
    Assignee: InnoLux Corporation
    Inventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
  • Patent number: 11961770
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Patent number: 11955338
    Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Chun Huang, Ya-Wen Yeh, Chien-Wen Lai, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Ru-Gun Liu, Chin-Hsiang Lin, Yu-Tien Shen
  • Patent number: 11942570
    Abstract: A micro LED and a manufacturing method thereof are provided. The micro LED includes a first semiconductor layer, an active layer, and a second semiconductor layer that are successively stacked together. The first semiconductor layer and the second semiconductor layer are of different types. The active layer includes a first quantum well layer and a second quantum well layer stacked together. The second quantum well layer and the second semiconductor layer form a nanoring. The first quantum well layer is configured to emit light of a first color. The second quantum well layer forming a sidewall of the nanoring is configured to emit light of a second color different from the first color. The first semiconductor layer is electrically coupled to a first electrode, and the second semiconductor layer is electrically coupled to a second electrode. A manufacturing method for a micro LED is provided.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: March 26, 2024
    Assignee: CHONGQING KONKA PHOTOELECTRIC TECHNOLOGY RESEARCH INSTITUTE CO., LTD.
    Inventors: Kuo-Tung Huang, Ya-Wen Lin, Chia-Hung Huang
  • Publication number: 20240097007
    Abstract: A semiconductor device is described. An isolation region is disposed on the substrate. A plurality of channels extend through the isolation region from the substrate. The channels including an active channel and an inactive channel. A dummy fin is disposed on the isolation region and between the active channel and the inactive channel. An active gate is disposed over the active channel and the inactive channel, and contacts the isolation region. A dielectric material extends through the active gate and contacts a top of the dummy fin. The inactive channel is a closest inactive channel to the dielectric material. A long axis of the active channel extends in a first direction. A long axis of the active gate extends in a second direction. The active channel extends in a third direction from the substrate. The dielectric material is closer to the inactive channel than to the active channel.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Ya-Yi Tsai, Shu-Uei Jang, Chih-Han Lin, Shu-Yuan Ku
  • Publication number: 20240021772
    Abstract: An optoelectronic semiconductor device is provided. The optoelectronic semiconductor device includes an epitaxial stack, a trench, a concave portion, a first contact structure, and a first electrode. The epitaxial stack includes a first semiconductor structure, an active structure on the first semiconductor structure, and a second semiconductor structure on the active structure, wherein the epitaxial stack has a first portion and a second portion, and the second semiconductor structure of the first portion is separated from the second semiconductor structure of the second portion. The trench is located between the first portion and the second portion. The concave portion is located in the first portion. The first contact structure is located in the concave portion. The first electrode covers the first contact structure. When the optoelectronic semiconductor device is operating, the first portion does not emit light.
    Type: Application
    Filed: July 14, 2023
    Publication date: January 18, 2024
    Inventors: Ching-En Huang, Hao-Ming Ku, Shih-I Chen, Tzu-Ling Yang, Ya-Wen Lin, Chuang-Sheng Lin, Yi-Chia Ho
  • Publication number: 20230378142
    Abstract: A pixel package includes a base material, a circuit structure, light-emitting semiconductor elements, a non-light-emitting semiconductor element, and a light-transmitting adhesive layer. The base material has an upper surface, a lower surface, and a side surface. The circuit structure is buried in the base material and includes an first circuit layer exposed from the upper surface, bottom electrodes exposed from the lower surface, and a middle circuit layer between the upper circuit layer and the plurality of bottom electrodes and covered by the base material. The light-emitting semiconductor elements are on the upper surface and electrically connected to the circuit structure. The non-light-emitting semiconductor element is buried in the base material and directly connected to the middle circuit layer, and at least one outside surface is exposed. The light-transmitting adhesive layer covers the light-emitting semiconductor elements and is in direct contact with the base material.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 23, 2023
    Inventors: Li-Yuan HUANG, Tzu-Hsiang WANG, Chi-Chih PU, Ya-Wen LIN, Pei-Yu LI, Hsiao-Pei CHIU
  • Publication number: 20230215972
    Abstract: The present application provides an epitaxial wafer of a red light-emitting diode, and a preparation method therefor, by designing an n-type semiconductor layer as a gradient layer with the content of an aluminum element gradually increasing along a growth direction of the epitaxial wafer and the content of an indium element gradually decreasing along a stacking direction of the epitaxial wafer, and a constant layer with the content of an aluminum element and an indium element not changing along the growth direction of the epitaxial wafer, the potential barrier at the side close to a multi-quantum well layer gradually rises, preventing electrons and holes in the multi-well quantum layer for radiative recombination from moving to the outside of the MQW region, confining the holes and electrons to have a radiative recombination in the MQW and reducing non-radiative recombination, and also facilitating the flowing of electrons in the n-layer to the MQW region.
    Type: Application
    Filed: September 16, 2020
    Publication date: July 6, 2023
    Inventors: Wenyang HUANG, Ya-Wen LIN, Kuo-Tung HUANG, Chia-Hung HUANG
  • Publication number: 20230207540
    Abstract: A light-emitting device includes a circuit carrier board having a short side and a long side, a plurality of light-emitting units on the circuit carrier board for emitting three or more color lights, and a light-transmitting glue layer on the circuit carrier board and covering the plurality of light-emitting units. The short side is shorter than the long side. The plurality of light-emitting units include a first light-emitting unit. The first light-emitting unit has a light exit surface, a first sidewall, and a second sidewall. The first sidewall faces the short side and has a first included angle with the light exit surface, and the second sidewall faces the long side and has a second included angle with the light exit surface. The first included angle is between 85 to 95 degrees, and the second included angle is less than 85 degrees or greater than 105 degrees.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 29, 2023
    Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Tzu-Hsiang WANG, Ya-Wen LIN, Chi-Chih PU, Hsiao-Pei CHIU, Ching-Tai CHENG, Chong-Yu WANG
  • Publication number: 20230207742
    Abstract: A pixel package includes an electrode structure, a plurality of light-emitting units arranged on the electrode structure, and a light transmitting layer. The electrode structure has an upper layer with a first upper sheet, a lower layer with a first lower sheet, and a supporting layer arranged between the upper layer and the lower layer. The electrode structure and the plurality of light-emitting units are fully embedded in the light transmitting layer. In a top view of the pixel package, the first upper sheet is overlapped with and larger than the first lower sheet.
    Type: Application
    Filed: December 29, 2021
    Publication date: June 29, 2023
    Inventors: Chi-Chih PU, Li-Yuan HUANG, Tzu-Hsiang WANG, Ya-Wen LIN
  • Publication number: 20220392876
    Abstract: A light-emitting device includes a first carrier, which includes a side surface between a first surface and a second surface, upper conductive pads on the first surface, and lower conductive pads under the second surface; a RDL pixel package includes a RDL which includes bonding pads and bottom electrodes, and the light-emitting units on the RDL, and connected to the bonding pads. A light-transmitting layer on the RDL and covers the light-emitting units, an upper surface, a lower surface, and a lateral surface between the upper surface and the lower surface. The RDL pixel package is on the first surface and electrically connected to the upper conductive pads. A protective layer covers the first surface and contacting the side surface of the RDL pixel package. The lower electrodes and the upper conductive pads are connected, and the distance between two adjacent bonding pads is less than 30 ?m.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 8, 2022
    Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Li-Yuan HUANG, Tzu-Hsiang WANG, Chi-Chih PU, Ya-Wen LIN, Hsiao-Pei CHIU, Pei-Yu LI
  • Publication number: 20220376145
    Abstract: Provided are a micro light-emitting diode chip and a manufacturing method therefor, and a display device. The micro light-emitting diode chip comprises: a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer which are sequentially stacked, wherein the light-emitting layer is located between the first-type semiconductor layer and the second-type semiconductor layer; and a reflective layer provided at a light-emitting side of the light-emitting layer, wherein the reflective layer is configured to block light emitted by the light-emitting layer to an edge of the micro light-emitting diode chip.
    Type: Application
    Filed: December 31, 2019
    Publication date: November 24, 2022
    Inventors: Shun-Kuei YANG, Chia-Hung HUANG, Ya-Wen LIN, Mao-Chia HUNG
  • Publication number: 20220254867
    Abstract: An electronic device includes a flexible substrate and a conductive wire. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. The metal portion includes a plurality of extending portions and a plurality of joint portions, and each of the openings is surrounded by two of the plurality of extending portions and two of the plurality of joint portions. A ratio of a sum of widths of the plurality of extending portions to a sum of widths of the plurality of joint portions is in a range from 0.8 to 1.2.
    Type: Application
    Filed: April 28, 2022
    Publication date: August 11, 2022
    Applicant: InnoLux Corporation
    Inventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
  • Patent number: 11348993
    Abstract: An electronic device includes a flexible substrate and a conductive wire. The flexible substrate includes a first bending region and a side region connected to the first bending region. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. A ratio of a total width of the metal portion disposed in the first bending region to a total width of the metal portion disposed in the side region is in a range from 0.8 to 1.2, and a length of one of the openings in the first bending region is less than or equal to a length of one of the openings in the side region.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: May 31, 2022
    Assignee: InnoLux Corporation
    Inventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
  • Publication number: 20210367101
    Abstract: A micro LED and a manufacturing method thereof are provided. The micro LED includes a first semiconductor layer, an active layer, and a second semiconductor layer that are successively stacked together. The first semiconductor layer and the second semiconductor layer are of different types. The active layer includes a first quantum well layer and a second quantum well layer stacked together. The second quantum well layer and the second semiconductor layer form a nanoring. The first quantum well layer is configured to emit light of a first color. The second quantum well layer forming a sidewall of the nanoring is configured to emit light of a second color different from the first color. The first semiconductor layer is electrically coupled to a first electrode, and the second semiconductor layer is electrically coupled to a second electrode. A manufacturing method for a micro LED is provided.
    Type: Application
    Filed: August 3, 2021
    Publication date: November 25, 2021
    Inventors: Kuo-Tung HUANG, Ya-Wen LIN, Chia-Hung HUANG
  • Publication number: 20210367100
    Abstract: This disclosure relates to a superlattice structure, an LED epitaxial structure, a display device, and a method for manufacturing the LED epitaxial structure. The superlattice structure includes at least two superlattice units which are grown in stacking layers. Each of the at least two superlattice units includes a first n-type GaN layer, a second n-type GaN layer, a first n-type GaInN layer, and a second n-type GaInN layer which are grown in stacking layers. The first n-type GaN layer has a doping concentration which is constant along a growth direction, the second n-type GaN layer has a doping concentration which gradually increases along the growth direction, the first n-type GaInN layer has a doping concentration which gradually decreases along the growth direction, and the second n-type GaInN layer has a doping concentration which is constant along the growth direction.
    Type: Application
    Filed: June 14, 2021
    Publication date: November 25, 2021
    Inventors: Wen Yang HUANG, Ya-Wen LIN, Kuo-Tung HUANG, Chia-Hung HUANG, Shun-Kuei YANG