Patents by Inventor Yachuan PANG

Yachuan PANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit structure and driving method thereof, chip and authentication method thereof, and electronic device
    Patent number: 10468099
    Abstract: A circuit structure for implementing a physical unclonable function and a driving method thereof, an integrated circuit chip and an authentication method thereof, an electronic device are disclosed. The circuit structure includes: a multilayer circuit, a first address circuit and an output circuit, the multilayer circuit includes a first RRAM device array which is addressable and a second RRAM device array which is addressable; the first address circuit is configured to map a resistance value of a second RRAM device in the second RRAM device array to a first address; the first address is used for positioning a selected first RRAM device; and the output circuit is configured to acquire and process a resistance value of the selected first RRAM device and output a processing result.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: November 5, 2019
    Assignee: Tsinghua University
    Inventors: Huaqiang Wu, Yachuan Pang, Bin Gao, He Qian
  • Circuit Structure and Driving Method Thereof, Chip and Authentication Method Thereof, and Electronic Device
    Publication number: 20190088325
    Abstract: A circuit structure for implementing a physical unclonable function and a driving method thereof, an integrated circuit chip and an authentication method thereof, an electronic device are disclosed. The circuit structure includes: a multilayer circuit, a first address circuit and an output circuit, the multilayer circuit includes a first RRAM device array which is addressable and a second RRAM device array which is addressable; the first address circuit is configured to map a resistance value of a second RRAM device in the second RRAM device array to a first address; the first address is used for positioning a selected first RRAM device; and the output circuit is configured to acquire and process a resistance value of the selected first RRAM device and output a processing result.
    Type: Application
    Filed: September 17, 2018
    Publication date: March 21, 2019
    Inventors: Huaqiang Wu, Yachuan PANG, Bin Gao, He Qian