Patents by Inventor Yair Kazarinov

Yair Kazarinov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9063729
    Abstract: Embodiments of the present invention provide an apparatus, system, and method of generating an execution instruction. Some demonstrative embodiments my include generating an execution instruction of a predetermined executable format based on memory address data of a memory-access instruction representing a memory address. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: June 23, 2015
    Assignee: Intel Corporation
    Inventors: Alon Naveh, Eliezer Weissmann, Itamar Kazachinsky, Iris Sorani, Yair Kazarinov
  • Publication number: 20130036317
    Abstract: Embodiments of the present invention provide an apparatus, system, and method of generating an execution instruction. Some demonstrative embodiments my include generating an execution instruction of a predetermined executable format based on memory address data of a memory-access instruction representing a memory address. Other embodiments are described and claimed.
    Type: Application
    Filed: August 22, 2012
    Publication date: February 7, 2013
    Inventors: Alon Naveh, Eliezer Weissmann, Itamar Kazachinsky, Iris Sorani, Yair Kazarinov
  • Patent number: 8281083
    Abstract: Embodiments of the present invention provide an apparatus, system, and method of generating an execution instruction. Some demonstrative embodiments my include generating an execution instruction of a predetermined executable format based on memory address data of a memory-access instruction representing a memory address. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: October 2, 2012
    Assignee: Intel Corporation
    Inventors: Alon Naveh, Eliezer Weissmann, Itamar Kazachinsky, Iris Sorani, Yair Kazarinov
  • Publication number: 20070005910
    Abstract: Embodiments of the present invention provide an apparatus, system, and method of generating an execution instruction. Some demonstrative embodiments my include generating an execution instruction of a predetermined executable format based on memory address data of a memory-access instruction representing a memory address. Other embodiments are described and claimed.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventors: Alon Naveh, Eliezer Weissmann, Itamar Kazachinsky, Iris Sorani, Yair Kazarinov