Abstract: The present disclosure provides a sorting scheduling method, apparatus and matrix sorting system in the field of warehousing and logistics technology, wherein the matrix sorting system includes multiple branch lines and multiple ring sorters, each branch line spans multiple ring sorters, each ring sorter is spanned by multiple branch lines, each branch line is provided with multiple sorting stations at each ring sorter, each said branch line is used to convey a stock box to the corresponding sorting station, and the sorted goods to be packaged at said sorting station flow on the corresponding ring sorter. The present disclosure adopts the matrix sorting form, and the order quantity completed by a sorting station can be increased dozens of times compared to the existing sorting station layout, which alleviates the problem of conveyor line blockage and realizes large-scale sorting operations.

Abstract: The present application provides a method, apparatus, electronic device and computer storage medium for assigning goods, and the method includes: obtaining historical order information and forward-looking order information; balancedly assigning each of the goods to a fixed location at each sorting station based on a historical order line quantity of each of the goods in the historical order information; determining a forward-looking order line quantity of the goods in the fixed locations at each of the sorting stations based on the forward-looking order information and the goods information in the fixed locations; and determining the goods to be assigned to motorized locations of each the sorting station based on the forward-looking order line quantity of the goods in the fixed locations at each of the sorting stations. Thus, the problem of uneven workload among operators at different sorting stations is solved, which leads to overall low operational efficiency.

Abstract: The present disclosure discloses a high-temperature fast-curing starch-based adhesive for particleboards and a preparation method thereof, belonging to the technical field of adhesive preparation. The low viscosity of the starch-based adhesive is ensured by selecting a crosslinking monomer which does not self-crosslink in a reaction process in the present disclosure, and a binary crosslinking agent matched with the crosslinking monomer is added before use to be quickly crosslinked with the crosslinking monomer at high temperature so as to ensure better thermosetting property and water resistance as well as faster curing speed of the starch-based adhesive at the same time, which meets the requirements of the particleboards for the adhesive, solves the problem of long curing time of the existing starch-based adhesives at high temperatures, further shortens the curing time of the starch-based adhesives to about 60 s, and improves the production efficiency of the particleboards.

Abstract: The disclosure relates to an enzymatic preparation method of inclusion complexes of tributyrin, and belongs to the technical field of oil microencapsulation. The disclosure combines enzymatic synthesis of cyclodextrin and inclusion of tributyrin with cyclodextrin, including enzymatic preparation of cyclodextrin with a CGT enzyme. Tributyrin is added in the preparation process; after reaction, Tween is added, and homogenization and spray drying are carried out. The effect of the finally obtained tributyrin powder is much better than that of single inclusion of tributyrin with cyclodextrin. The disclosure is simple in process, low in cost and convenient in operation; reaction processes are free of toxicity and pollution; there are no toxic reagent residues; the inclusion effect is obvious, and better utilization of a nutritional additive tributyrin in actual production is facilitated.

Abstract: The disclosure discloses a production process and application of fermented tapioca starch for baking, and belongs to the fields of starch deep processing and food processing and production. The disclosure develops a production method of the fermented tapioca starch for baking. The method includes simple steps and greatly shortens a process cycle. By using tapioca starch as a main raw material and adding a specific amount of carbon source and a specific strain, under the action of fermentation and illumination in cooperation, the structure of the starch is improved. By adding the fermented tapioca starch, the effects of increasing the size of gluten-free Mochi bread, increasing pores of the bread and improving the texture and taste of the bread are realized.

Abstract: The present disclosure discloses a high-temperature fast-curing starch-based adhesive for particleboards and a preparation method thereof, belonging to the technical field of adhesive preparation. The low viscosity of the starch-based adhesive is ensured by selecting a crosslinking monomer which does not self-crosslink in a reaction process in the present disclosure, and a binary crosslinking agent matched with the crosslinking monomer is added before use to be quickly crosslinked with the crosslinking monomer at high temperature so as to ensure better thermosetting property and water resistance as well as faster curing speed of the starch-based adhesive at the same time, which meets the requirements of the particleboards for the adhesive, solves the problem of long curing time of the existing starch-based adhesives at high temperatures, further shortens the curing time of the starch-based adhesives to about 60 s, and improves the production efficiency of the particleboards.

Abstract: Provided is a system for analyzing a multivariate time series that includes at least one processor programmed or configured to receive a time series of historical data points, determine a historical time period, determine a contemporary time period, determine a first time series of data points associated with a historical transaction metric from the historical time period, determine a second time series of data points associated with a historical target transaction metric from the historical time period, determine a third time series of data points associated with a contemporary transaction metric from the contemporary time period, and generate a machine learning model, wherein the machine learning model is configured to provide an output that comprises a predicted time series of data points associated with a contemporary target transaction metric. Methods and computer program products are also provided.

Abstract: A computer-implemented method according to one embodiment includes generating a first matrix based on words extracted from documents, and generating a second matrix based on deduplication chunks. The deduplication chunks include words of the documents. Word clustering is performed based on an analysis performed on the second matrix. Each cluster of the words represents a feature of at least one of the documents. The method further includes generating a third matrix based on the first matrix and the clusters, and performing text mining using the third matrix. A computer program product according to another embodiment includes a computer readable storage medium having program instructions embodied therewith. The program instructions are readable and/or executable by a computer to cause the computer to perform the foregoing method.

Abstract: A diode and a manufacturing method therefor, and a semiconductor device. The diode includes: a substrate; an insulating buried layer provided on the substrate; a semiconductor layer provided on the insulating buried layer; anode; and a cathode, comprising: a trench-type contact, a trench being filled with a contact material, the trench extending from a first surface of the semiconductor layer to a second surface of the semiconductor layer, the first surface being a surface distant from the insulating buried layer, and the second surface being a surface facing the insulating buried layer; a cathode doped region surrounding the trench-type contact around and at the bottom of the trench-type contact, and also disposed on the first surface around the trench-type contact; and a negative electrode located on the cathode doped region and electrically connected to the cathode doped region.

Abstract: A method, computer system, and computer program product for data monitoring management are provided. A first invalid zero value candidate from a data stream is received. A memory location for the first invalid zero value candidate is received. At a first time an access connection to the memory location is established. At a second time subsequent to the first time the access connection to the memory location is checked. Based on the checking, a determination is made whether the first invalid zero value candidate contains an invalid zero value.

Abstract: A transient voltage suppression device and a manufacturing method therefor, the transient voltage suppression device including: a substrate, a first conductivity type well region and a second conductivity type well region disposed in the substrate. The first conductivity type well region includes a first well, a second well, and a third well. The second conductivity type well region includes a fourth well that isolates the first well from the second well, and a fifth well that isolates the second well from the third well. The device further includes a Zener diode well region provided in the first well, a first doped region provided in the Zener diode well region, a second doped region provided in the Zener diode well region, a third doped region provided in the second well, a fourth doped region provided in the third well, and a fifth doped region provided in the third well.

Abstract: Disclosed herein are de-bondable polyurethane adhesives based on thermally expandable microspheres, obtainable or obtained by the reaction of the components of (A) at least one di- or polyisocyanate, (B) at least one polyol, (C) catalyst, (D) thermally expandable microspheres, and (E) other additives, wherein the isocyanate index of the reaction is set in the range of from 28 to 65. Additionally disclosed herein is a method of using the de-bondable polyurethane adhesives for de-bonding metal and cutting pad during wafer cutting. Further disclosed herein is a method of using the de-bondable polyurethane adhesives in mechanical property testing sample preparation.

Abstract: A memory device includes a stack structure over a substrate, a channel structure extending in the stack structure, and a dielectric layer over the channel structure. The dielectric layer includes a first material. The memory device may also include a drain-select gate (DSG) cut structure extending through the dielectric layer. The DSG cut structure includes a second material different from the first material.

Abstract: Disclosed is a safety syringe that comprises a needle sleeve (1), a needle base (3) and a core rod (2). First claws (34) on the needle base (3) are configured to clamp in a first groove (111) on an inner wall of the needle sleeve (1), one of a proximal end of the needle base (3) and a distal end of the core rod (2) is provided with second claws (33), and the other one thereof is provided with a position-limiting member; the second claws (33) are configured to abut against the position-limiting member along a slanted surface.

Abstract: A transient voltage suppression device includes: a substrate; a first conductive type well region including a first well and a second well; a second conductive type well region including a third well and a fourth well, the third well being disposed between the first well and the second well so as to isolate the first well and the second well, and the second well being disposed between the third well and the fourth well; a zener diode active region; a first doped region, provided in the first well; a second doped region, provided in the first well; a third doped region, provided in the second well; a fourth doped region, provided in the second well; a fifth doped region, provided in the zener diode active region; and a sixth doped region, provided in the zener diode active region.

Abstract: Described herein is a method for joining a first metal pipe with a second metal pipe, the pipes being joined together in an overlapping area by use of a two-component polyurethane adhesive that encapsulates the overlapping area, where the method includes the steps of: (1) applying the two-component polyurethane adhesive onto an inner surface of a fixture; (2) inserting one end of the first metal pipe into one end of the second metal pipe so as to form a pipe assembly having the overlapping area between the two ends, and putting the overlapping area of the pipe assembly into the fixture; (3) closing the fixture such that the overlapping area of the pipe assembly is fixed in the fixture, and such that the adhesive therein encapsulates the overlapping area of the pipe assembly; (4) curing the two-component polyurethane adhesive; and (5) optionally, removing the fixture from the pipe assembly.

Abstract: An insulated gate bipolar transistor, comprising an anode second conductivity-type region and an anode first conductivity-type region provided on a drift region; the anode first conductivity-type region comprises a first region and a second region, and the anode second conductivity-type region comprises a third region and a fourth region, the dopant concentration of the first region being less than that of the second region, the dopant concentration of the third region being less than that of the fourth region, the third region being provided between the fourth region and a body region, the first region being provided below the fourth region, and the second region being provided below the third region and located between the first region and the body region.

Abstract: A TVS device and a manufacturing method therefor. The TVS device comprises: a first doping type semiconductor substrate (100); a second doping type deep well I (101), a second doping type deep well II (102), and a first doping type deep well (103) provided on the semiconductor substrate; a second doping type heavily doped region I (104) provided in the second doping type deep well I (101); a first doping type well region (105) and a first doping type heavily doped region I (106) provided in the second doping type deep well II (102); a first doping type heavily doped region II (107) and a second doping type heavily doped region II (108) provided in the first doping type deep well (105); a second doping type heavily doped region III (109) located in the first doping type well region (105) and the second doping type deep well II (102); and a first doping type doped region (110) provided in the first doping type well region (105).

Abstract: A trench gate depletion-type VDMOS device and a method for manufacturing the same are disclosed. The device comprises a drain region; a trench gate including a gate insulating layer on an inner wall of a trench and a gate electrode filled in the trench and surrounded by the gate insulating layer; a channel region located around the gate insulating layer; a well region located on both sides of the trench gate; a source regions located within the well region; a drift region located between the well region and the drain region; a second conductive-type doped region located between the channel region and the drain region; and a first conductive-type doped region located on both sides of the second conductive-type doped region and located between the drift region and the drain region.

Abstract: The present application provides an integrated semiconductor device and an electronic apparatus, comprising a semiconductor substrate and a first doped epitaxial layer having a first region, a second region, and a third region; a partition structure is arranged in the third region; the first region is formed having at least two second doped deep wells, and the second region is formed having at least two second doped deep wells; a dielectric island partially covers a region between two adjacent doped deep wells in the first region and second region; a gate structure covers the dielectric island; a first doped source region is located on the two sides of the gate structure, and a first doped source region located in the same second doped deep well is separated; a first doped trench is located on the two sides of the dielectric island in the first region, and extends laterally to the first doped source region.