Abstract: A physical unclonable function (PUF) circuit structure is provided, which comprises: n passive conductor groups and n XOR units, where each of the n passive conductor groups comprises m passive conductors, each of the m passive conductors comprises a first terminal connected to a power supply and a second terminal connected to an input terminal of a corresponding XOR unit of the n XOR units; and the second terminals of passive conductors within the same passive conductor group are connected to an input terminal of the corresponding XOR unit. In the circuit structure, the connection randomness of the passive conductors is achieved by using a different widths and/or different spaces of the passive conductors, and then a PUF function can be realized.

Abstract: Embodiments of the disclosure provide a display device and an assembling method thereof. The display device comprises a frame and a display module provided inside the frame, and the display module comprises a liquid crystal panel and a transparent cover plate. A transparent bonding adhesive is fully filled between a light exit surface of the liquid crystal panel and a surface of the transparent cover plate facing the liquid crystal panel and bonds the light exit surface of the liquid crystal panel with the surface of the transparent cover plate facing the liquid crystal panel. A support mechanism is disposed on an inner surface of the frame, and the support mechanism is bonded with the liquid crystal panel and/or the transparent cover plate.

Abstract: A scheduling method includes: determining whether a valid time interval is shorter than a first time interval; and when the valid time interval is smaller than the first time interval, performing a search for a time length of N predetermined search cycles. In each of the predetermined search cycles, N consecutive TD-SCDMA sub-frames are regarded as a group, and one fixed sub-frame in the group is selected for the search. In the N predetermined search cycles, the fixed sub-frames selected from the group in respective predetermined search cycles are different. N is a natural number greater than or equal to 2.

Abstract: The present invention provides a terminal, comprising: a judging unit for judging whether an application corresponding to a desktop icon can run normally upon receiving an operation instruction triggering the desktop icon; and a restoring unit for restoring the application in a preset manner when the application cannot run normally. Correspondingly, the present invention also provides an application restoring method. The technical solutions of the present invention can automatically restore an application that cannot run normally when the desktop icon is triggered, and can execute corresponding functions according to different responses to improve users' experience.

Abstract: Embodiments of the disclosure provide a display device and an assembling method thereof. The display device comprises a frame and a display module provided inside the frame, and the display module comprises a liquid crystal panel and a transparent cover plate. A transparent bonding adhesive is fully filled between a light exit surface of the liquid crystal panel and a surface of the transparent cover plate facing the liquid crystal panel and bonds the light exit surface of the liquid crystal panel with the surface of the transparent cover plate facing the liquid crystal panel. A support mechanism is disposed on an inner surface of the frame, and the support mechanism is bonded with the liquid crystal panel and/or the transparent cover plate.

Abstract: A scheduling method includes: determining whether a valid time interval is shorter than a first time interval; and when the valid time interval is smaller than the first time interval, performing a search for a time length of N predetermined search cycles. In each of the predetermined search cycles, N consecutive TD-SCDMA sub-frames are regarded as a group, and one fixed sub-frame in the group is selected for the search. In the N predetermined search cycles, the fixed sub-frames selected from the group in respective predetermined search cycles are different. N is a natural number greater than or equal to 2.

Abstract: The present invention provides a terminal, comprising: a judging unit for judging whether an application corresponding to a desktop icon can run normally upon receiving an operation instruction triggering the desktop icon; and a restoring unit for restoring the application in a preset manner when the application cannot run normally. Correspondingly, the present invention also provides an application restoring method. The technical solutions of the present invention can automatically restore an application that cannot run normally when the desktop icon is triggered, and can execute corresponding functions according to different responses to improve users' experience.

Abstract: In particular, the present invention relates to a method and system for improving the efficiency of computational processes and specifically multiply and accumulate (“MAC”) processes such as the DCT (“Discrete Cosine Transform”) and/or IDCT (“Inverse Discrete Cosine Transform”) using a performance optimized method and associated hardware apparatus.

Abstract: An algorithm and hardware structure is described for numerical operations on signals that is reconfigurable to operate in a downsampling or non-downsampling mode. According to one embodiment, a plurality of adders and multipliers are reconfigurable via a switching fabric to operate as a plurality of MAAC ( multiply-add-accumulator) kernels (described in detail below), when operating in a non-downsampling mode and a plurality of MAAC kernels and AMAAC (add-multiply-add-accumulator) kernals (described in detail below), when operating in a downsampling mode.

Abstract: In particular, the present invention relates to a method and system for improving the efficiency of computational processes and specifically multiply and accumulate (“MAC”) processes such as the DCT (“Discrete Cosine Transform”) and/or IDCT (“Inverse Discrete Cosine Transform”) using a performance optimized method and associated hardware apparatus.

Abstract: In particular, the present invention relates to a method and system for improving the efficiency of computational processes and specifically multiply and accumulate (“MAC”) processes such as the DCT (“Discrete Cosine Transform”) and/or IDCT (“Inverse Discrete Cosine Transform”) using a performance optimized method and associated hardware apparatus.

Abstract: A method and system for processing data arriving from a bit-stream to perform numerical computations in a temporal order independent fashion. According to one embodiment, the method is applied to IDCT computations to allow processing of IDCT coefficients in the same order they are received from an MPEG bit stream. The coefficients are not required to be converted from scan order to array order before processing. This provides significant advantages in that it imposes minimal storage requirements for the coefficients and the coefficients are processed in scan order.

Abstract: The present invention provides an algorithm and hardware structure for numerical operations on signals that is reconfigurable to operate in a downsampling or non-downsampling mode. According to one embodiment, a plurality of adders and multipliers are reconfigurable via a switching fabric to operate as a plurality of MAAC kernels (described in detail below), when operating in a non-downsampling mode and a plurality of MAAC kernels and AMAAC kernels (described in detail below), when operating in a downsampling mode.

Abstract: In particular, the present invention relates to a method and system for improving the efficiency of computational processes and specifically multiply and accumulate (“MAC”) processes such as the DCT (“Discrete Cosine Transform”) and/or IDCT (“Inverse Discrete Cosine Transform”) using a performance optimized method and associated hardware apparatus.

Abstract: A semiconductor wafer is transported by a mechanical system into or out of a quartz housing filled with a protection gas. The wafer is placed between and spaced apart from two graphite plates. A RF induction coil surrounding the quartz housing is used to heat the graphite plates. Radiation from the heated graphite plates heats the wafer from room temperature to an elevated desired temperature. During the time period when a wafer absorbs radiation primarily through electron-to-electron transition, heat convection and conduction by the protection gas conveys heat from the graphite plates to the wafer to accelerate the heating of the wafer and reduces temperature nonuniformity of the wafer.

Abstract: A new .sup.111 In-BLM complex designated .sup.111 In-BLMC is described. The complex is characterized by a lack of capacity for binding to serum transferrin, a high selective affinity for viable tumor tissue, in vivo stability, improved activity ratios of tumor to tissues over known .sup.111 In-BLM complexes, tumor imaging flexibility and distinctness, and rapid clearance from the body. The new .sup.111 In-BLM Complex thus has clinical use as a radiopharmaceutical for combining radiotherapy and chemotherapy, and as a tumor-imaging agent for diagnosis.