Abstract: In one embodiment, an integrated circuit cell includes a first circuit component and a second circuit component. The first circuit component includes fin field-effect transistors (finFETs) formed in a high fin portion of the integrated circuit cell, the high fin portion of the integrated circuit including a plurality of fin structures arranged in rows. The second circuit component that includes finFETs formed in a less fin portion of the integrated circuit cell, the less fin portion of the integrated circuit including a lesser number of fin structures than the high fin portion of the integrated circuit cell.

Abstract: A violation checking method includes generating a violation log report for a design, classifying violation logs in the violation log report into high-risk logs and low-risk logs by a machine learning model, reviewing the high-risk logs, and modifying the design if at least one bug is identified in the high-risk logs.

Abstract: Disclosed are systems, apparatuses, processes, and computer-readable media to capture images. A method of processing image data includes determining a first region of interest (ROI) in an image. The first ROI is associated with a first object. The method can include determining one or more image characteristics of the first ROI. The method can further include determining whether to perform an upsampling process on image data in the first ROI based on the one or more image characteristics of the first ROI.

Abstract: A roller shutter includes a chamber with an opening, a roller curtain movable between being fully contained within the chamber and extended beyond the chamber through the opening, and at least one guide rail along and relative to which the roller curtain is movable between being retracted and extended, wherein the roller curtain includes a plurality of slat members interlocked with each other for relative pivotal movement, the plurality of slat members collectively forming first and second major surfaces, and a first layer of fire-resistant and/or heat-resistant fabric fixedly mounted to the first major surface of the slat members and a second layer of fire-resistant and/or heat-resistant fabric fixedly mounted to the second major surface of the slat members, and wherein the guide rail includes at least a first sealing member which, when the roller curtain is extended, contacts or presses into the first layer of fire-resistant and/or heat-resistant fabric.

Abstract: The subject invention pertains to a new class of compounds, N-acryloylindole (NAIs), and methods of using NAIs as cysteine-reactive probes for proteome-wide cysteine profiling and imaging of thiol oxidative modifications. NAIs are capable of imaging oxidized thiols in cells facing oxidative stress by confocal fluorescence microscopy. NAIs can capture populations of cysteines, particularly those involved in gene expression and regulation.

Abstract: An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.

Abstract: Disclosed are an isolation method for a high-performance computer system, and a high-performance computer system. The isolation method comprises node-level isolation performed. The node-level isolation comprises: configuring a routing table for each computing node, and configuring, in the routing table, valid routing information for computing node pairs; when any one source computing node needs to communicate with a target computing node, determining, by lookup, whether valid routing information exists between the source computing node and the target computing node according to the configured routing table; if so, allowing the source computing node to communicate with the target computing node; otherwise, forbidding the source computing node from communicating with the target computing node.

Abstract: The present invention provides anti-HtrA1 antibodies (including bispecific anti-HtrA1 anti-Factor D antibodies) and methods of making and using the same, for example, in methods of treating HtrA1-associated disorders, ocular disorders, and/or complement-associated disorders.

Abstract: The present disclosure provides a surgical shunt assembly tool that provides a more efficacious grip on the catheter tubes and prevent the tip of the catheter from buckling while the catheter is pushed onto the tip of the valve during installation of shunts during CSF shunt surgery. The tool includes standard handles such as used in a shodded mosquito tool having a clamping jaw integrated into the distal end section of the handle. The distal jaw includes two forcep jaw sections each having a proximal end integrally formed with a distal end of a distal end arm section of one of the two handle arms, and a distal end section extending away from the distal end arm section. The distal end sections of the forcep jaw sections are cylindrically shaped such that when the forcep jaw is closed by bringing the two forcep jaw sections together, a cylinder is formed having a diameter substantially equal to a diameter of a catheter tube to be attached to a shunt valve tip.

Abstract: A high electron mobility transistor (HEMT) includes a GaN epi-layer, a first passivation layer, a source electrode metal, a drain electrode metal, a gate electrode metal, and a field plate. The first passivation layer is deposited on the GaN epi-layer. The source electrode metal, the drain electrode metal, and the gate electrode are recessed into the first passivation layer and deposited on the GaN epi-layer. The source electrode metal has a source field plate with a source field plate length Lsf. The drain electrode metal has a drain field plate with a drain field plate length Ldf, wherein Ldf>Lsf. The gate electrode is situated between the source electrode metal and the drain electrode metal. The field plate is situated between the gate electrode and the drain electrode metal.

Abstract: A high electron mobility transistor (HEMT) and method for forming the same are disclosed. The high electron mobility transistor has a GaN epi-layer, a source ohmic contact, a drain ohmic contact, a gate structure, a first metal electrode contact and a first passivation layer. The source ohmic contact and the drain ohmic contact are disposed on the epi-layer. The gate structure is disposed on the epi-layer and between the source ohmic contact and the drain ohmic contact. The first metal electrode contact is disposed above the gate structure. The first passivation layer is sandwiched between the first metal electrode contact and the gate structure.

Abstract: This disclosure relates to a semiconductor device, and associated method of manufacture. The semiconductor device includes, a MOSFET integrated with a p-n junction, the p-n junction arranged as a clamping diode across a source contact and a drain contact of the MOSFET. The MOSFET defines a first breakdown voltage, and the clamping diode defines a second breakdown voltage, and the first breakdown voltage is greater than the second breakdown voltage. A series resistance of the clamping diode includes a drift resistance and a clamping resistance, and the drift resistance is formed together with the clamping diode and the clamping resistance is formed independently from the clamping diode and configured to secure a uniform avalanche current.

Abstract: A method for operating a power consumption metering system and a power consumption metering system are disclosed. In an embodiment a method include measuring, by a sensor deployed at a monitored site, high speed power consumption values over time to obtain a high speed value pattern of power consumption with a resolution of more than 1000 values per second, determining one or more harmonics of the high speed value pattern, measuring, by the sensor, low speed power consumption values over time to obtain a low speed value pattern of the power consumption with a resolution of less than 100 values per second, providing the harmonics and the low speed value pattern to a cloud based data processing system and identifying a status of a power consumer of the monitored site dependent on the measured harmonics and the low speed value pattern.

Abstract: A switch circuit, a mixer, and an electronic device, where the switch circuit includes a first metal oxide semiconductor (MOS) transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor, both a gate of the first MOS transistor and a gate of the fourth MOS transistor are connected to a first port, and both a gate of the second MOS transistor and a gate of the third MOS transistor are connected to a second port; and a lead between the gate of the first MOS transistor and the first port, a lead between the gate of the second MOS transistor and the second port, a lead between the gate of the third MOS transistor and the second port, and a lead between the gate of the fourth MOS transistor and the first port all have an equal length. In this way, linearity is relatively high.

Abstract: A roller shutter includes a chamber with an opening, a roller curtain movable between being fully contained within the chamber and extended beyond the chamber through the opening, and at least one guide rail along and relative to which said roller curtain is movable between being retracted and extended, wherein the roller curtain includes a plurality of slat members interlocked with each other for relative pivotal movement, the plurality of slat members collectively forming first and second major surfaces, and a first layer of fire-resistant and/or heat-resistant fabric fixedly mounted to the first major surface of the slat members and a second layer of fire-resistant and/or heat-resistant fabric fixedly mounted to the second major surface of the slat members, and wherein the guide rail includes at least a first sealing member which, when the roller curtain is extended, contacts or presses into the first layer of fire-resistant and/or heat-resistant fabric.

Abstract: The present disclosure provides a surgical shunt assembly tool that provides a more efficacious grip on the catheter tubes and prevent the tip of the catheter from buckling while the catheter is pushed onto the tip of the valve during installation of shunts during CSF shunt surgery. The tool includes standard handles such as used in a shodded misquito tool having a clamping jaw integrated into the distal end section of the handle. The distal jaw includes two forcep jaw sections each having a proximal end integrally formed with a distal end of a distal end arm section of one of the two handle arms, and a distal end section extending away from the distal end arm section. The distal end sections of the forcep jaw sections are cylindrically shaped such that when the forcep jaw is closed by bringing the two forcep jaw sections together, a cylinder is formed having a diameter substantially equal to a diameter of a catheter tube to be attached to a shunt valve tip.

Abstract: An electrical device for a conveyance is provided. The electrical device includes a flexible display panel having a first edge and a partition device having a second edge. The partition device is disposed between the flexible display panel and the conveyance. A relative position between the first edge and the second edge is changeable.

Abstract: The present disclosure relates to a semiconductor device, and associated method of manufacture. The semiconductor device includes, MOSFET integrated with a p-n junction, the p-n junction arranged as a clamping diode across a source contact and a drain contact of the MOSFET. The MOSFET defines a first breakdown voltage and the clamping diode defines a second breakdown voltage, with the first breakdown voltage being greater than the second breakdown voltage so that the clamp diode is configured and arranged to receive a low avalanche current and the MOSFET is configured and arranged to receive a high avalanche current.

Abstract: A method for operating a power consumption metering system and a power consumption metering system are disclosed. In an embodiment a method include measuring, by a sensor deployed at a monitored site, high speed power consumption values over time to obtain a high speed value pattern of power consumption with a resolution of more than 1000 values per second, determining one or more harmonics of the high speed value pattern, measuring, by the sensor, low speed power consumption values over time to obtain a low speed value pattern of the power consumption with a resolution of less than 100 values per second, providing the harmonics and the low speed value pattern to a cloud based data processing system and identifying a status of a power consumer of the monitored site dependent on the measured harmonics and the low speed value pattern.