Patents by Inventor Yang Yu

Yang Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240016860
    Abstract: Disclosed are a Bacillus coagulans and its application for improving constipation, belonging to the field of microbial strains. The Bacillus coagulans disclosed in the present application is preserved in China General Microbiological Culture Collection Center (CGMCC) on Nov. 10, 2021, with a preservation number of CGMCC No. 23766 and a preservation address of the Institute of Microbiology, Chinese Academy of Sciences, No. 3, Yard No. 1 Beichen West Road, Chaoyang District, Beijing.
    Type: Application
    Filed: September 1, 2023
    Publication date: January 18, 2024
    Inventors: Xueping YU, Xin MA, Yang YU
  • Publication number: 20240012425
    Abstract: The present disclosure provides a method for displaying a pose of a robot in a three-dimensional map, an apparatus, a device, and a storage medium. The method includes: acquiring a three-dimensional map of a space in which the robot is located; acquiring a two-dimensional map constructed by the robot; matching the three-dimensional map with the two-dimensional may constructed by the robot to obtain a correspondence between the three-dimensional map and the two-dimensional map constructed by the robot; acquiring a nose of the robot on the two-dimensional map constructed by the robot; and displaying a pose of the robot in the three-dimensional map based on the pose of the robot on the two-dimensional map constructed by the robot and the correspondence between the three-dimensional map and the two-dimensional map constructed by the robot.
    Type: Application
    Filed: November 29, 2021
    Publication date: January 11, 2024
    Inventors: Yang YU, Zhen WU
  • Patent number: 11861643
    Abstract: A system and method of determining a policy to prevent fading drivers is described. The system and method creates virtual trajectories of incentives such as coupons offered to drivers in a transportation hailing system and corresponding states of drivers in response to the incentives. A joint policy simulator is created from an incentive policy, a confounding incentive policy, and an incentive object policy to generate the simulated actions of drivers in response to different incentives. The rewards of the simulated actions of the drivers is determined by a discriminator. The incentive policy for preventing fading drivers is optimized by reinforcement learning based on the virtual trajectories generated by the joint policy simulator and discriminator.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: January 2, 2024
    Assignee: BEIJING DIDI INFINITY TECHNOLOGY AND DEVELOPMENT CO., LTD.
    Inventors: Wenjie Shang, Qingyang Li, Zhiwei Qin, Yiping Meng, Yang Yu, Jieping Ye
  • Patent number: 11863077
    Abstract: A power supply system includes an input stage comprising first and second input switches to provide a primary current responsive first and second input switching signals. A transformer generates a secondary current responsive to the primary current. An output stage comprises an output, a first output switch, a second output switch and a clamping switch. The output stage can be configured to generate an output voltage at the output by rectifying the secondary current responsive to respective first and second output switching signals. The clamping switch can be configured to close responsive to a clamp switching signal during an activation dead-time between closing the first input switch and the second input switch. The system further includes a switching controller configured to generate the first and second input switching signals and the first and second output switching signals based on the output voltage, and to generate the clamp switching signal.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: January 2, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sheng-Yang Yu, Lieh-Chung Yin
  • Patent number: 11855057
    Abstract: Provided are a package structure and a method of forming the same. The method includes: laterally encapsulating a device die and an interconnect die by a first encapsulant; forming a redistribution layer (RDL) structure on the device die, the interconnect die, and the first encapsulant; bonding a package substrate onto the RDL structure, so that the RDL structure is sandwiched between the package substrate and the device die, the interconnect die, and the first encapsulant; laterally encapsulating the package substrate by a second encapsulant; and bonding a memory die onto the interconnect die, wherein the memory die is electrically connected to the device die through the interconnect die and the RDL structure.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Yu-Min Liang, Jiun-Yi Wu, Chien-Hsun Lee
  • Patent number: 11849472
    Abstract: Methods and apparatuses are presented to facilitate coexistence between multiple wireless communication protocols implemented by a wireless communication device, by dynamically adjusting priority between the two protocols. The wireless communication device may typically favor a first protocol (e.g. Bluetooth/BTLE), prioritizing resource requests by the first protocol. In certain use cases, the first protocol may demand high resource usage for an extended time, particularly for newer tracking and wearable devices, such as location tags, watches, headsets, etc. Such applications can disrupt existing use cases for a second protocol (e.g., Wi-Fi). Therefore, the wireless communication device may dynamically determine whether the second protocol is performing critical operations, such as latency-sensitive applications or high-performance operations. If so, the wireless communication device may allocate resources accordingly in real time, e.g.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: December 19, 2023
    Assignee: Apple Inc.
    Inventors: Nohee Ko, Camille Chen, Kenneth Victa, Sanjay Mani, Balaji Ravindran, Yang Yu
  • Patent number: 11843403
    Abstract: Disclosed are methods, systems, and computer-readable medium to perform operations in a wireless device that includes a first radio that operates according to a first wireless protocol and a second radio that operates according to a second wireless protocol. The operations include determining that the first radio has received a grant to an antenna of the wireless device, where the wireless device further includes a secondary radio configured to perform actions according to the first and second wireless protocols. The operations also include selecting the first radio or the secondary radio to perform an action according to the first wireless protocol. Further, the operations include instructing the selected one of the first radio and the secondary radio to perform the action, thereby avoiding conflict between the primary radio and the secondary radio.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: December 12, 2023
    Assignee: Apple Inc.
    Inventors: Shehla Rana, Yang Yu, Rajneesh Kumar
  • Publication number: 20230394738
    Abstract: The present disclosure relates to methods and apparatus for graphics processing, e.g., a GPU. The apparatus may receive an image including a plurality of pixels associated with one or more workgroups and one or more pixel tiles, each of the workgroups and the pixel tiles including one or more pixels of the plurality of pixels. The apparatus may determine whether the one or more workgroups are misaligned with the one or more pixel tiles. The apparatus may determine a conversion order of the one or more workgroups when the one or more workgroups are misaligned with the one or more pixel tiles, the conversion order corresponding to a common multiple of one of the one or more workgroups and one of the one or more pixel tiles. The apparatus may convert each of the one or more workgroups based on the conversion order of the one or more workgroups.
    Type: Application
    Filed: November 9, 2020
    Publication date: December 7, 2023
    Inventors: Yibin ZHANG, Zilin YING, Yun DU, Heng QI, Jiexia YU, Yang YU, Andrew Evan GRUBER, Jian LIANG, Tao WANG, Alexei Vladimirovich BOURD, Gang ZHONG, Minjie HUANG
  • Publication number: 20230381407
    Abstract: A delivery device for delivering medicament, such as insulin, to a patient includes a housing and a base enclosing an inner cavity. Enclosed within the housing is a reservoir for containing a medicament, a delivery mechanism for delivering the medicament to the patient, and a pump in fluid communication with the reservoir and delivery mechanism. The base has an integrally formed fluid channel covered by a flexible membrane in fluid communication with the reservoir and the delivery mechanism. A peristaltic pump mechanism includes a cam assembly having a plurality of cams and cam follower assembly with a plurality of protrusions to sequentially engaging the flexible membrane to advance the fluid through fluid channel.
    Type: Application
    Filed: October 5, 2021
    Publication date: November 30, 2023
    Applicant: Becton, Dickinson and Company
    Inventors: Bo Yang YU, Alessandro PIZZOCHERO, J. Richard GYORY, Mark WOOD
  • Publication number: 20230387061
    Abstract: A chip package structure includes a fan-out package containing at least one semiconductor die, an epoxy molding compound (EMC) die frame laterally surrounding the at least one semiconductor die, and a redistribution structure. The fan-out package has chamfer regions at which horizontal surfaces and vertical surfaces of the fan-out package are connected via angled surfaces that are not horizontal and not vertical. The chip package structure may include a package substrate that is attached to the fan-out package via an array of solder material portions, and an underfill material portion that laterally surrounds the array of solder material portions and contacts an entirety of the angled surfaces. The angled surfaces eliminate a sharp corner at which mechanical stress may be concentrated, and distribute local mechanical stress in the chamfer regions over a wide region to prevent cracks in the underfill material portion.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Wei-Yu CHEN, Chi-Yang YU, Kuan-Lin HO, Chin-Liang CHEN, Yu-Min LIANG, Jiun Yi WU
  • Publication number: 20230378021
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang, Wen-Lin Chen
  • Patent number: 11824032
    Abstract: A chip package structure includes a fan-out package containing at least one semiconductor die, an epoxy molding compound (EMC) die frame laterally surrounding the at least one semiconductor die, and a redistribution structure. The fan-out package has chamfer regions at which horizontal surfaces and vertical surfaces of the fan-out package are connected via angled surfaces that are not horizontal and not vertical. The chip package structure may include a package substrate that is attached to the fan-out package via an array of solder material portions, and an underfill material portion that laterally surrounds the array of solder material portions and contacts an entirety of the angled surfaces. The angled surfaces eliminate a sharp corner at which mechanical stress may be concentrated, and distribute local mechanical stress in the chamfer regions over a wide region to prevent cracks in the underfill material portion.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: November 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wei-Yu Chen, Chi-Yang Yu, Kuan-Lin Ho, Chin-Liang Chen, Yu-Min Liang, Jiun Yi Wu
  • Publication number: 20230352389
    Abstract: A semiconductor structure includes a redistribution structure, topmost and bottom conductive terminals. The redistribution structure includes a topmost pad in a topmost dielectric layer, a topmost under-bump metallization (UBM) pattern directly disposed on the topmost pad and the topmost dielectric layer, a bottommost UBM pad embedded in a bottommost dielectric layer, and a bottommost via laterally covered by the bottommost dielectric layer. Bottom surfaces of the topmost pad and the topmost dielectric layer are substantially coplanar, bottom surfaces of the bottommost UBM pad and the bottommost dielectric layer are substantially coplanar, the bottommost via is disposed on a top surface of the bottommost UBM pad, top surfaces of the bottommost via and the bottommost dielectric layer are substantially coplanar. The topmost conductive terminal lands on a recessed top surface of the topmost UBM pattern, and the bottommost conductive terminal lands on the planar bottom surface of the bottommost UBM.
    Type: Application
    Filed: July 11, 2023
    Publication date: November 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Jiun-Yi Wu, Chi-Yang Yu, Yu-Min Liang, Wei-Yu Chen
  • Patent number: 11781942
    Abstract: A method for determining flow velocity distribution in the roughness sublayer is provided, which uses the experimental device that includes a variable-slope circulating flume system and a flow-measuring system, the variable-slope circulating flume system is used to study flow in the roughness sublayer, and the flow-measuring system is used to measure flow velocity in each zone in the flume. In the variable-slope circulating flume, the method according to the invention uses cylindrical aluminum rods to simulate large-scale roughness elements, and the submergence, the average bulk flow velocity and the distribution density of roughness elements are changed.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: October 10, 2023
    Inventors: Jing Yan, Hanqing Zhao, Hongwu Tang, Limo Tang, Xiaoli Wang, Jinyu Zheng, Yang Yu
  • Patent number: 11784106
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: October 10, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang, Wen-Lin Chen
  • Patent number: 11785593
    Abstract: Methods, systems, and apparatus are presented for providing enhanced scheduling requests, e.g., in an IEEE 802.11 network. A client station (STA) may determine one or more minimum quality of service (QoS) metrics for supporting an application being implemented by the STA, and may determine minimum scheduling parameters to be implemented by an access point (AP) to achieve the minimum QoS. The STA may transmit to the AP a specific scheduling request indicating the minimum scheduling parameters. In response, the AP may schedule communication resources for the STA in accordance with the minimum scheduling resources.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: October 10, 2023
    Assignee: Apple Inc.
    Inventors: Guoqing Li, Brajesh K. Dave, Shehla S. Rana, Yang Yu, Rajneesh Kumar
  • Publication number: 20230307466
    Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate comprises a base substrate, and a first thin film transistor and a second thin film transistor formed on the base substrate, wherein a first active layer of the first thin film transistor is made of low-temperature polysilicon, and a second active layer of the second thin film transistor is made of a metal oxide. The display substrate further comprises a first barrier layer on a side of the second active layer close to the base substrate and a second barrier layer on a side of the second active layer away from the base substrate. The orthographic projection of the second active layer onto the base substrate falls within the orthographic projections of the first barrier layer and the second barrier layer onto the base substrate.
    Type: Application
    Filed: December 21, 2020
    Publication date: September 28, 2023
    Inventors: Qiuhua MENG, Ming LIU, Yang YU
  • Publication number: 20230307385
    Abstract: A semiconductor package includes a substrate, a semiconductor device, and a ring structure. The semiconductor device disposed on the substrate. The ring structure disposed on the substrate and surrounds the semiconductor device. The ring structure includes a first portion and a second portion. The first portion bonded to the substrate. The second portion connects to the first portion. A cavity is between the second portion and the substrate.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 28, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Jung-Wei Cheng, Yu-Min Liang, Jiun-Yi Wu, Yen-Fu Su, Chien-Chang Lin, Hsin-Yu Pan
  • Patent number: 11770731
    Abstract: Some embodiments of this disclosure include apparatuses and methods for implementing a target wake time (TWT) scheme that includes traffic differentiation and service period extension. For example some embodiments relate to an electronic device including a transceiver and one or more processors communicatively coupled to the transceiver. The one or more processors receive an indication of traffic associated with an application. The one or more processors determine information associated with the traffic and configure the TWT scheme associated with the traffic based at least in part on the determined information. The one or more processors further communicate initial information associated with the TWT scheme to an access point of a wireless network. The initial information associated with the TWT scheme can include at least one of traffic direction information, traffic pattern information, a traffic identifier (TID), or an access category, indication (ACID).
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: September 26, 2023
    Assignee: Apple Inc.
    Inventors: Guoqing Li, Yang Yu, Welly Kasten, Shehla S. Rana, Mete Fikirlier, Karthik R. Mekala, Charles F. Dominguez, Yong Liu, Rajneesh Kumar
  • Publication number: 20230288107
    Abstract: A throttling device, including a tank for accommodating liquid refrigerant, with an orifice plate arranged at an outlet of the tank; a floating ball capable of floating on a liquid surface of the refrigerant; a pivot rod pivotally fixed on the tank through a pivot shaft; a connecting rod, with one end thereof fixedly connected with the floating ball, and the other end thereof fixedly connected with the pivot rod; a valve plate fixed on the pivot rod and located near an orifice of the orifice plate, wherein the valve plate is capable of adjusting a flow area of the orifice under the action of the pivot rod; and a limit piece located above the valve plate and being movable to limit the valve plate.
    Type: Application
    Filed: March 6, 2023
    Publication date: September 14, 2023
    Inventors: Yang Yu, Lihui Yang, Haiping Ding, Qunyi Ma, Rui Rui, Lei Yu