Patents by Inventor Yanhua Wang

Yanhua Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9314161
    Abstract: According to one embodiment, a moving object contour extraction apparatus includes a contour acquisition unit and a contour correction unit. The contour acquisition unit is configured to acquire a contour of a moving object in each image slice. The contour correction unit is configured to correct the contours of the moving object in image slices of at least one image slice time series based on motion trend information of the moving object in each of a plurality of image slice time series.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: April 19, 2016
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventors: Yanhua Wang, Chao Cong, Yanli Wang, Shaobin Wang
  • Publication number: 20160063702
    Abstract: A medical image processing apparatus according to an embodiment includes an estimation circuitry and a tracking circuitry. The estimation circuitry is configured to estimate the activity of the myocardium across a plurality of images at different time phases from a group of images where a plurality of images containing a myocardium are chronologically arranged. The tracking circuitry is configured to set a search range for tracking the myocardium in the group according to the activity of the myocardium and perform the tracking.
    Type: Application
    Filed: May 20, 2015
    Publication date: March 3, 2016
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventors: Hong YANG, Yanhua Wang, Minfeng Xu, Bing Han
  • Patent number: 9275266
    Abstract: A moving object contour tracking apparatus includes a contour tracking section for performing, by taking an initial contour of the moving object in a predetermined image slice as a starting contour, contour tracking in a first time direction to acquire a first contour of the moving object and contour tracking in a second time direction to acquire a second contour of the moving object in each image slice; a contour comparison section for calculating, in the predetermined image slice, a similarity between the first contour and the initial contour and a similarity between the second contour and the initial contour; and a contour correction section for taking the contours in the image slices that are acquired in a contour tracking direction corresponding to the greater one of the two similarities as the contours of the moving object in the respective image slices.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: March 1, 2016
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MEDICAL SYSTEMS CORPORATION
    Inventors: Yanhua Wang, Chao Cong, Yanli Wang, Shaobin Wang, Qiuying Dong
  • Publication number: 20160004901
    Abstract: A moving object contour tracking apparatus includes a contour tracking section for performing, by taking an initial contour of the moving object in a predetermined image slice as a starting contour, contour tracking in a first time direction to acquire a first contour of the moving object and contour tracking in a second time direction to acquire a second contour of the moving object in each image slice; a contour comparison section for calculating, in the predetermined image slice, a similarity between the first contour and the initial contour and a similarity between the second contour and the initial contour; and a contour correction section for taking the contours in the image slices that are acquired in a contour tracking direction corresponding to the greater one of the two similarities as the contours of the moving object in the respective image slices.
    Type: Application
    Filed: September 11, 2015
    Publication date: January 7, 2016
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventors: Yanhua WANG, Chao CONG, Yanli WANG, Shaobin WANG, Qiuying DONG
  • Publication number: 20150323413
    Abstract: A tap-scan bridge damage detection system comprises: a mobile cart (1) capable of moving on a to-be-detected bridge; a tap subsystem (2) mounted on the mobile cart (1) and used for applying a tap load to the to-be-detected bridge; a signal acquisition subsystem (3) mounted on the mobile cart and used for acquiring a response signal transferred from the to-be-detected bridge to the mobile cart; and a signal processing apparatus (4) connected to the signal acquisition subsystem (3) and used for receiving and processing a signal acquired by the signal acquisition subsystem (3), and outputting the bridge damage information processed result. The tap-scan bridge damage detection system can detect bridge damage in a simple, convenient, efficient and accurate manner.
    Type: Application
    Filed: December 27, 2013
    Publication date: November 12, 2015
    Applicants: TSINGHUA UNIVERSITY, CHINA ROAD & BRIDGE CORPORATION
    Inventors: Jianchu Zhang, Zhihai Xiang, Hong Liu, Zhihuai Li, Qiuhai Lu, Yaoguo Sun, Yanhua Wang, Lianyou Li, Zhaopu Shen
  • Patent number: 9171220
    Abstract: A moving object contour tracking apparatus includes a contour tracking section for performing, by taking an initial contour of the moving object in a predetermined image slice as a starting contour, contour tracking in a first time direction to acquire a first contour of the moving object and contour tracking in a second time direction to acquire a second contour of the moving object in each image slice; a contour comparison section for calculating, in the predetermined image slice, a similarity between the first contour and the initial contour and a similarity between the second contour and the initial contour; and a contour correction section for taking the contours in the image slices that are acquired in a contour tracking direction corresponding to the greater one of the two similarities as the contours of the moving object in the respective image slices.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: October 27, 2015
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventors: Yanhua Wang, Chao Cong, Yanli Wang, Shaobin Wang, Qiuying Dong
  • Publication number: 20140254898
    Abstract: The present invention relates to a medical image processing apparatus, an image processing method and a medical image device. The medical image processing apparatus comprises a deformation field calculation unit, a deformation field weighting unit and an image deformation unit. The deformation field calculation unit may calculate a field of deformation of a first image of an object with respect to a second image. The deformation field weighting unit may weight the field according to motion intensities of respective components of the object. The image deformation unit may deform the first image by using the weighted field.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 11, 2014
    Applicants: TOSHIBA MEDICAL SYSTEMS CORPORATION, KABUSHIKI KAISHA TOSHIBA
    Inventors: Yanhua WANG, Nobutoku MOTOMURA, Yanli WANG
  • Patent number: 8735245
    Abstract: The present disclosure relates to the microelectronics field, and particularly, to a metal oxide resistive switching memory and a method for manufacturing the same. The method may comprise: forming a W-plug lower electrode above a MOS device; sequentially forming a cap layer, a first dielectric layer, and an etching block layer on the W-plug lower electrode; etching the etching block layer, the first dielectric layer, and the cap layer to form a groove for a first level of metal wiring; sequentially forming a metal oxide layer, an upper electrode layer, and a composite layer of a diffusion block layer/a seed copper layer/a plated copper layer in the groove for the first level of metal wiring; patterning the upper electrode layer and the composite layer by CMP, to form a memory cell and the first level of metal wiring in the groove in the first dielectric layer; and performing subsequent processes to complete the metal oxide resistive switching memory.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: May 27, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Hangbing Lv, Ming Liu, Shibing Long, Qi Liu, Yanhua Wang, Jiebin Niu
  • Patent number: 8665631
    Abstract: The present disclosure provides a resistive random memory cell and a resistive random memory. The resistive random memory cell comprises an upper electrode, a resistive layer, an intermediate electrode, an asymmetric tunneling barrier layer, and a lower electrode. The upper electrode, the resistive layer, and the intermediate electrode constitute a resistive storage portion. The intermediate electrode, the asymmetric tunneling barrier layer, and the lower electrode constitute a selection portion. The resistive storage portion and the selection portion share the intermediate electrode. The selection portion may be disposed above or under the resistive storage portion. The asymmetric tunneling barrier layer comprises at least two materials having different barrier heights, and is configured for rectifying forward tunneling current and reverse tunneling current flowing through the resistive random memory cell.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: March 4, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Zongliang Huo, Ming Liu, Manhong Zhang, Yanhua Wang, Shibing Long
  • Publication number: 20130184570
    Abstract: According to one embodiment, a moving object contour extraction apparatus includes a contour acquisition unit and a contour correction unit. The contour acquisition unit is configured to acquire a contour of a moving object in each image slice. The contour correction unit is configured to correct the contours of the moving object in image slices of at least one image slice time series based on motion trend information of the moving object in each of a plurality of image slice time series.
    Type: Application
    Filed: July 19, 2012
    Publication date: July 18, 2013
    Applicants: Toshiba Medical Systems Corporation, Kabushiki Kaisha Toshiba
    Inventors: Yanhua WANG, Chao Cong, Yanli Wang, Shaobin Wang
  • Publication number: 20130182935
    Abstract: A moving object contour tracking apparatus includes a contour tracking section for performing, by taking an initial contour of the moving object in a predetermined image slice as a starting contour, contour tracking in a first time direction to acquire a first contour of the moving object and contour tracking in a second time direction to acquire a second contour of the moving object in each image slice; a contour comparison section for calculating, in the predetermined image slice, a similarity between the first contour and the initial contour and a similarity between the second contour and the initial contour; and a contour correction section for taking the contours in the image slices that are acquired in a contour tracking direction corresponding to the greater one of the two similarities as the contours of the moving object in the respective image slices.
    Type: Application
    Filed: July 19, 2012
    Publication date: July 18, 2013
    Applicants: Toshiba Medical Systems Corporation, Kabushiki Kaisha Toshiba
    Inventors: Yanhua WANG, Chao CONG, Yanli WANG, Shaobin WANG, Qiuying DONG
  • Patent number: 8346239
    Abstract: Methods, systems, and computer program products for silence insertion descriptor (SID) conversion are disclosed. According to one aspect, the subject matter described herein includes a method for silence insertion descriptor (SID) conversion. The method includes receiving a wireless frame, the frame identifying a first node as a frame source and a second node as a frame destination; determining whether tandem-free operation (TFO) is applicable; responsive to a determination that TFO is applicable, determining whether the frame is a SID frame; responsive to a determination that the frame is a SID frame, determining whether the SID format used by the first node is incompatible with the SID format used by the second node; and responsive to a determination that the SID format used by the first node is incompatible with the SID format used by the second node, converting the SID frame from the SID format used by the first node to the SID format used by the second node.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: January 1, 2013
    Assignee: Genband US LLC
    Inventors: Yanhua Wang, Philip Abraham
  • Publication number: 20120305883
    Abstract: The present disclosure relates to the microelectronics field, and particularly, to a metal oxide resistive switching memory and a method for manufacturing the same. The method may comprise: forming a W-plug lower electrode above a MOS device; sequentially forming a cap layer, a first dielectric layer, and an etching block layer on the W-plug lower electrode; etching the etching block layer, the first dielectric layer, and the cap layer to form a groove for a first level of metal wiring; sequentially forming a metal oxide layer, an upper electrode layer, and a composite layer of a diffusion block layer/a seed copper layer/a plated copper layer in the groove for the first level of metal wiring; patterning the upper electrode layer and the composite layer by CMP, to form a memory cell and the first level of metal wiring in the groove in the first dielectric layer; and performing subsequent processes to complete the metal oxide resistive switching memory.
    Type: Application
    Filed: June 30, 2011
    Publication date: December 6, 2012
    Applicant: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Hangbing Lv, Ming Liu, Shibing Long, Qi Liu, Yanhua Wang, Jiebin Niu
  • Publication number: 20120281452
    Abstract: The present disclosure provides a resistive random memory cell and a resistive random memory. The resistive random memory cell comprises an upper electrode, a resistive layer, an intermediate electrode, an asymmetric tunneling barrier layer, and a lower electrode. The upper electrode, the resistive layer, and the intermediate electrode constitute a resistive storage portion. The intermediate electrode, the asymmetric tunneling barrier layer, and the lower electrode constitute a selection portion. The resistive storage portion and the selection portion share the intermediate electrode. The selection portion may be disposed above or under the resistive storage portion. The asymmetric tunneling barrier layer comprises at least two materials having different barrier heights, and is configured for rectifying forward tunneling current and reverse tunneling current flowing through the resistive random memory cell.
    Type: Application
    Filed: June 30, 2011
    Publication date: November 8, 2012
    Inventors: Zongliang Huo, Ming Liu, Manhong Zhang, Yanhua Wang, Shibing Long
  • Patent number: 7463682
    Abstract: This invention presents a coding method for binary digits coding and its circuit for digits transmission. With this coding method, the binary digits are corresponding to a sequence of pulse groups. The binary digits “0” and “1” are corresponding to the two pulse groups with same defined number of pulses and with two special defined pulse frequencies respectively. The two pulse groups have the same defined number of pulses. The number is at least 2. The corresponding decoding method divides the sequence of pulse groups, according to the same defined number, into a set of pulse groups. The duration time of each pulse group is measured. The binary digits “0” and “1” are corresponding to the differences of the duration time of the pulse groups.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: December 9, 2008
    Assignee: Institute of Process Engineering, Chinese Academy of Sciences
    Inventors: Zhangyuan Yang, Li Guo, Yanhua Wang
  • Publication number: 20080160987
    Abstract: Methods, systems, and computer program products for silence insertion descriptor (SID) conversion are disclosed. According to one aspect, the subject matter described herein includes a method for silence insertion descriptor (SID) conversion. The method includes receiving a wireless frame, the frame identifying a first node as a frame source and a second node as a frame destination; determining whether tandem-free operation (TFO) is applicable; responsive to a determination that TFO is applicable, determining whether the frame is a SID frame; responsive to a determination that the frame is a SID frame, determining whether the SID format used by the first node is incompatible with the SID format used by the second node; and responsive to a determination that the SID format used by the first node is incompatible with the SID format used by the second node, converting the SID frame from the SID format used by the first node to the SID format used by the second node.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 3, 2008
    Inventors: Yanhua Wang, Philip Abraham
  • Patent number: 6747318
    Abstract: A method for fabricating buried channel NMOS devices and the devices themselves are disclosed. These buried channel NMOS devices are fabricated with a p-type substrate, an n-type implant in the top portion (approximately 400 to 1000 Å deep) of the substrate, and an insulating gate dielectric above the n-type implant. An n-type or p-type doped polysilicon gate electrode is formed on top of the insulating gate dielectric. The n-type implant region is doped in such a way that it is depleted of charge carriers when the device's gate electrode is at the same potential as the well (zero bias). When the gate electrode is biased +Ve with respect to the device's well substrate a conducting channel of mobile electrons is formed in a portion of the buried layer. This type of biasing is known as inversion bias since the charge carriers are of the opposite type than the p-well.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: June 8, 2004
    Assignee: LSI Logic Corporation
    Inventors: Ravindra M. Kapre, Tommy Hsiao, Yanhua Wang, Kyungjin Min
  • Publication number: 20040071208
    Abstract: This invention presents a coding method for binary digits coding and its circuit for digits transmission. With this coding method, the binary digits are corresponding to a sequence of pulse groups. The binary digits “0” and “1” are corresponding to the two pulse groups with same defined number of pulses and with two special defined pulse frequencies respectively. The said two pulse groups have the same defined number of pulses. The said number is at least 2. The corresponding decoding method divides the said sequence of pulse groups, according to the same defined number, into a set of pulse groups. The duration time of each pulse group is measured. The binary digits “0” and “1” are corresponding to the differences of the duration time of the pulse groups. This invention presents the improvement in data transmission rate and reach in comparing with the relative technology.
    Type: Application
    Filed: July 30, 2003
    Publication date: April 15, 2004
    Applicant: INSTITUTE OF PROCESS ENGINEERING ACADEMY OF SCIENCES
    Inventors: Zhangyuan Yang, Li Guo, Yanhua Wang
  • Patent number: 6424019
    Abstract: A process for fabricating a trench filled with an insulating material in a surface of an integrated circuit substrate is described. One step of the process includes defining a masking layer on a composite layered stack above a region to be protected on the integrated circuit substrate surface. The composite layered stack includes a layer of a first material and a polishing stopping layer. The layer of the first material has a polishing rate by chemical mechanical polishing that is greater than a polishing rate by chemical mechanical polishing of the insulating material. Another step of the process includes etching through the composite layered stack and the integrated circuit substrate to form the trench in the integrated circuit substrate surface and depositing the insulating material on the integrated circuit substrate surface such that the trench is filled with the insulating material.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: July 23, 2002
    Assignee: LSI Logic Corporation
    Inventors: Shouli Steve Hsia, Yanhua Wang, Jayanthi Pallinti
  • Patent number: 6060370
    Abstract: A process for fabricating a trench filled with an insulating material in a surface of an integrated circuit substrate is described. One step of the process includes defining a masking layer on a composite layered stack above a region to be protected on the integrated circuit substrate surface. The composite layered stack includes a layer of a first material and a polishing stopping layer. The layer of the first material has a polishing rate by chemical mechanical polishing that is greater than a polishing rate by chemical mechanical polishing of the insulating material. Another step of the process includes etching through the composite layered stack and the integrated circuit substrate to form the trench in the integrated circuit substrate surface and depositing the insulating material on the integrated circuit substrate surface such that the trench is filled with the insulating material.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: May 9, 2000
    Assignee: LSI Logic Corporation
    Inventors: Shouli Steve Hsia, Yanhua Wang, Jayanthi Pallinti