Abstract: A digital integrated circuit comprising a logic array comprises a functional logic block, a logic unit for detecting transient errors affecting the functional logic block, an input FIFO memory for supplying the functional logic block with samples, an output FIFO memory for receiving samples output from the functional logic block, a buffer memory that is supplied with samples by the input FIFO memory, and a logic control unit that is able to control read access to the input FIFO memory and write access to the output FIFO memory and that is configured, when an error is detected by the transient-error-detecting logic unit, to reset the transient-error-detecting logic unit and the functional logic block, to suspend write access to the output FIFO memory and to switch the input of the functional logic block to the output of the buffer memory.

Abstract: A system for dynamic calibration of a first radiofrequency chain to be calibrated comprises: an injection device for injecting a calibration signal whose waveform is predetermined, connected upstream of the radiofrequency chain to be calibrated, and a compensation device for compensating the amplitude-wise and phase-wise disparities caused by the first chain to be calibrated including a controlled compensation filter. The automatic calibration system comprises a device for temporal erasure of the calibration signal injected with the aid of an analog or digital subtracter, the subtracter being connected downstream of the first radiofrequency chain to be calibrated.

Abstract: A digital integrated circuit comprising a logic array comprises a functional logic block, a logic unit for detecting transient errors affecting the functional logic block, an input FIFO memory for supplying the functional logic block with samples, an output FIFO memory for receiving samples output from the functional logic block, a buffer memory that is supplied with samples by the input FIFO memory, and a logic control unit that is able to control read access to the input FIFO memory and write access to the output FIFO memory and that is configured, when an error is detected by the transient-error-detecting logic unit, to reset the transient-error-detecting logic unit and the functional logic block, to suspend write access to the output FIFO memory and to switch the input of the functional logic block to the output of the buffer memory.

Abstract: A system for dynamic calibration of a first radiofrequency chain to be calibrated comprises: an injection device for injecting a calibration signal whose waveform is predetermined, connected upstream of the radiofrequency chain to be calibrated, and a compensation device for compensating the amplitude-wise and phase-wise disparities caused by the first chain to be calibrated including a controlled compensation filter. The automatic calibration system comprises a device for temporal erasure of the calibration signal injected with the aid of an analogue or digital subtracter, the subtracter being connected downstream of the first radiofrequency chain to be calibrated.