Abstract: The present application provides a structure and method for improving near-infrared quantum efficiency of a backside illuminated image sensor. The structure includes a substrate and a plurality of photodiodes. The photodiodes are formed in the substrate. A cell deep trench isolation structure is fabricated on a surface of each photodiode. The cross section of the cell deep trench isolation structure 3 parallel to the surface of said photodiode comprises one or both of a four-quadrant square shape and a Union Jack shape. In the present application, by fabricating the cell deep trench isolation structures on the surface of each photodiode, the cell deep trench isolation structures increase light scattering in the photodiode, thus the optical path is increased, thereby improving the absorption of incident light, especially in near-infrared wavelength. As a result the quantum efficiency and sensor's imaging quality are improved.

Abstract: The present application provides a method for automatically detecting a wafer backside brightfield image anomaly, at least comprising: processing wafer backside brightfield images by means of histogram equalization, so as to obtain processed images; compiling statistics for a gray histogram of the processed images; calculating the number of abnormal pixels in each of the images; and providing a threshold, and highlighting the image with a score less than the threshold. In the present application, the wafer backside brightfield images are analyzed by means of image preprocessing and a specific calculation method, so as to quickly and automatically detect an abnormal wafer backside image.

Abstract: Provided is a method for generating configuration information of a dynamic reconfigurable processor. The dynamic reconfigurable processor includes a processing unit array, and the processing unit array includes a plurality of processing units. The method includes steps of: reading information of a task to be executed and generating an array configuration information top of the processing unit array according to the information; generating a plurality of processing unit configuration information corresponding to the plurality of processing units respectively according to the information; and assembling the array configuration information top and the plurality of processing unit configuration information.

Abstract: Provided is a method for generating configuration information of a dynamic reconfigurable processor. The dynamic reconfigurable processor includes a processing unit array, and the processing unit array includes a plurality of processing units. The method includes steps of: reading information of a task to be executed and generating an array configuration information top of the processing unit array according to the information; generating a plurality of processing unit configuration information corresponding to the plurality of processing units respectively according to the information; and assembling the array configuration information top and the plurality of processing unit configuration information.