Abstract: A semiconductor package includes a substrate and at least one integrated circuit (IC) die. Substrate solder resist has substrate solder resist openings exposing substrate bonding pads of the bonding surface of the substrate, and die solder resist has aligned die solder resist openings exposing die bonding pads of the bonding surface of the IC die. A ball grid array (BGA) electrically connects the die bonding pads with substrate bonding pads via the die solder resist openings and the substrate solder resist openings. The die solder resist openings include a subset A of the die solder resist openings in a region A of the bonding surface of the IC die and a subset B of the die solder resist openings in a region B of the bonding surface of the IC die. The die solder resist openings of subset A are larger than those of subset B.

Abstract: The present invention sets forth an apparatus for supporting multiple digital display interface standards. In one embodiment, the apparatus includes a graphics processing unit (GPU) configured to determine a display device type of a display device that is in connection with a digital display interconnect, receive a display device information associated with the display device, and output a first data signal to the display device. The display device is of display port (DP) digital display interface standard and the digital display interconnect is of digital visual interface (DVI) digital display interface standard. The apparatus further includes a removable adaptor circuitry between the display device and the digital display interconnect.

Abstract: A method for manufacturing a LCD panel includes providing a substrate defining a TFT region and a pixel region; forming a transparent conductive layer and a first metal layer on the substrate in that order; forming a gate line in the TFT region, and a pixel electrode within the pixel region via a first photo-etching process; forming an insulating layer and a semiconductor layer on the substrate in that order; removing the insulating layer and the semiconductor layer from the pixel region; removing the first metal layer from the pixel region; forming a second metal layer on the substrate; forming a source electrode and a drain electrode in the TFT region via a second photo-etching process, and forming a protecting layer above the substrate.

Abstract: A method for manufacturing a LCD panel includes providing a substrate defining a TFT region and a pixel region; forming a transparent conductive layer and a first metal layer on the substrate in that order; forming a gate line in the TFT region, and a pixel electrode within the pixel region via a first photo-etching process; forming an insulating layer and a semiconductor layer on the substrate in that order; removing the insulating layer and the semiconductor layer from the pixel region; removing the first metal layer from the pixel region; forming a second metal layer on the substrate; forming a source electrode and a drain electrode in the TFT region via a second photo-etching process, and forming a protecting layer above the substrate.

Abstract: The present invention sets forth an apparatus for supporting multiple digital display interface standards. In one embodiment, the apparatus includes a graphics processing unit (GPU) configured to determine a display device type of a display device that is in connection with a digital display interconnect, receive a display device information associated with the display device, and output a first data signal to the display device. The display device is of display port (DP) digital display interface standard and the digital display interconnect is of digital visual interface (DVI) digital display interface standard. The apparatus further includes a removable adaptor circuitry between the display device and the digital display interconnect.

Abstract: An exemplary method for manufacturing a TFT array substrate (20) typically for use in a liquid crystal display (LCD) includes: providing an insulating substrate (30) comprising a TFT area (31), a display area (32) and a capacitor area (33); forming a gate electrode (232) at the TFT area and a capacitor electrode (222) at the capacitor area; forming an insulating layer (203), an amorphous silicon layer (204), and a doped amorphous silicon layer (205) in turn on the insulating substrate; etching the doped amorphous silicon, the amorphous silicon and the insulating layer at the display area and the capacitor area; forming a source electrode (231) and a drain electrode (233) at the TFT area; forming a passivation layer (225) at the capacitor area; and forming a pixel electrode (221) on the substrate, the pixel electrode covering the display area, the capacitor area, and part of the TFT area.

Abstract: One embodiment of the present invention sets forth an electronic assembly, which comprises a printed circuit board having at least one opening, an electronic component mounted on a first side of the printed circuit board, and a thermal dissipation structure including at least one heat sink having a first surface and a second surface. The first surface includes a first region coupled with a surface of the electronic component, and one or more second region provided with at least a heat dissipating member that is exposed through the opening on a second side of the printed circuit board.

Abstract: One embodiment of the present invention sets forth an electronic assembly, which comprises a printed circuit board having at least one opening, an electronic component mounted on a first side of the printed circuit board, and a thermal dissipation structure including at least one heat sink having a first surface and a second surface. The first surface includes a first region coupled with a surface of the electronic component, and one or more second region provided with at least a heat dissipating member that is exposed through the opening on a second side of the printed circuit board.

Abstract: An exemplary method for fabricating a thin film transistor array substrate (200) includes: providing an insulating substrate (201); coating a transparent conductive layer (202) and a gate metal layer (203) on the substrate; forming a gate electrode (213) and a pixel electrode (212) using a first photo-mask process; forming a gate insulating layer (204), an amorphous silicon layer (205), a doped amorphous silicon layer (206), and a source/drain metal layer (207) on the substrate; forming a plurality of source electrodes (227) and a plurality of drain electrodes (228) using a second photo-mask process; depositing a metal layer (208) on the substrate and the pixel electrodes; and forming a passivation layer (209) on the source electrodes, the drain electrodes and the channels and a plurality of metal contact layers (218) using a third photo-mask process.

Abstract: An exemplary TFT array substrate (2) includes an insulating substrate (201); a transparent conductive line (221) formed on the insulating substrate; a plurality of gate lines (210) formed on the transparent conductive line, that are parallel to each other and that each extend along a first direction; a plurality of data lines (220) formed on the insulating substrate, that are parallel to each other and that each extend along a second direction orthogonal to the first direction. The gate line at an intersection point of the gate line and the data line are disconnected.

Abstract: An exemplary method for manufacturing a TFT array substrate (20) typically for use in a liquid crystal display (LCD) includes: providing an insulating substrate (30) comprising a TFT area (31), a display area (32) and a capacitor area (33); forming a gate electrode (232) at the TFT area and a capacitor electrode (222) at the capacitor area; forming an insulating layer (203), an amorphous silicon layer (204), and a doped amorphous silicon layer (205) in turn on the insulating substrate; etching the doped amorphous silicon, the amorphous silicon and the insulating layer at the display area and the capacitor area; forming a source electrode (231) and a drain electrode (233) at the TFT area; forming a passivation layer (225) at the capacitor area; and forming a pixel electrode (221) on the substrate, the pixel electrode covering the display area, the capacitor area, and part of the TFT area.

Abstract: An exemplary thin film transistor substrate (200) includes a substrate (201), a gate (212), a gate insulating layer (203), an amorphous silicon layer (214), a pixel electrode (216), a drain (217), and a source (218). The gate is formed at the gate. The gate insulating layer is formed at the gate. The amorphous silicon layer is formed at the gate insulating layer. The transparent conductive layer is formed at the amorphous silicon layer. The pixel electrode is formed at the amorphous silicon layer. The drain is formed at the pixel electrode. The source is formed at the transparent conductive layer.

Abstract: An exemplary method for fabricating a thin film transistor array substrate (200) includes: providing an insulating substrate (201); coating a transparent conductive layer (202) and a gate metal layer (203) on the substrate; forming a gate electrode (213) and a pixel electrode (212) using a first photo-mask process; forming a gate insulating layer (204), an amorphous silicon layer (205), a doped amorphous silicon layer (206), and a source/drain metal layer (207) on the substrate; forming a plurality of source electrodes (227) and a plurality of drain electrodes (228) using a second photo-mask process; depositing a metal layer (208) on the substrate and the pixel electrodes; and forming a passivation layer (209) on the source electrodes, the drain electrodes and the channels and a plurality of metal contact layers (218) using a third photo-mask process.

Abstract: The present invention provides a device and a method for monitoring a component arranged inside a computer. The monitoring device includes: a detection unit, an I2C bus, a display panel, a processor, and a regulation unit. The detection unit is used for detecting and acquiring the information of operation statuses of components inside the computer. The I2C bus coupled to the detection unit is used for transmitting the forgoing detected information. The display panel arrange at a shell of the computer is used for displaying the foregoing information. The processor will receive the information from the I2C bus and thereby display the received information on the display panel.

Abstract: A heat dissipation method for microprocessors to dissipate heat for a microprocessor of low power consumption includes a fan directly mounting on the microprocessor. The fan directs external cold air to the microprocessor to perform heat exchange and to achieve heat dissipation object.

Abstract: The present invention provides a device and a method for monitoring a component arranged inside a computer. The monitoring device comprises: a detection unit, an I2C bus, a display panel, a processor, and a regulation unit. The detection unit is used for detecting and acquiring the information of operation statuses of components inside the computer. The I2C bus coupled to the detection unit is used for transmitting the forgoing detected information. The display panel arrange at a shell of the computer is used for displaying the foregoing information. The processor will receive the information from the I2C bus and thereby display the received information on the display panel.

Abstract: A method of dynamically adjusting an operational frequency of a digital processing device. The method includes the steps of selecting a frequency operational mode, setting a work range of operational frequency according to the frequency operational mode, and selecting an operational frequency within the frequency range for running the digital processing device.

Abstract: In a method and system for the remote reception of real-time audio/video programmes, a receiver station establishes an Internet connection with a source station that is connected to a signal source, which provides a programme signal containing a plurality of channels of audio/video programmes. The source station is enabled to select one of the channels of the programme signal, to convert programme content of the selected one of the channels into digital programme data, to compress the digital programme data to result in compressed programme data, to convert the compressed programme data into a format suitable for transmission over the Internet, and to transmit the compressed programme data to the receiver station through the Internet.

Abstract: A display interface is adapted for use in a computer to control display of images by a monitor, and includes a first basic input/output system (BIOS) that is capable of being upgraded, a second BIOS that is maintained in an original version, and a switch unit associated operably with the first and second BIOS and capable of switching from a first state, where the first BIOS is selected for use when the computer is activated, and a second state, where the second BIOS is selected for use when the computer is activated.