Patents by Inventor Yao Tong

Yao Tong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11946755
    Abstract: Online ride-hailing and invoice issuing methods, systems and apparatuses are provided. An example method comprises: receiving a first ride-hailing request from a user terminal, wherein the first ride-hailing request includes one or more transport capacity types, one or more online ride-hailing service providers providing the corresponding one or more transport capacity types, a start location and a destination location; sending one or more second ride-hailing requests to one or more online ride-hailing service platforms corresponding to the one or more online ride-hailing service providers according to the one or more transport capacity types and the one or more online ride-hailing service providers; receiving one or more second ride-hailing response messages returned by one or more of the one or more online ride-hailing service platforms; and returning a first ride-hailing message to the user terminal based on the second one or more ride-hailing response messages.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: April 2, 2024
    Assignee: BEIJING AUTONAVI YUNMAP TECHNOLOGY CO., LTD.
    Inventors: Shaohang Yang, Yao Tong, Guang Yang, Yonghao Zhang, Linya Zhou, Xinhua Li
  • Patent number: 11886902
    Abstract: Disclosed are a Physical to Virtual (P2V) migration method and apparatus, and a storage medium. The method includes that: disk data of a Physical Machine (PM) is transmitted to a server, wherein the disk data is used by the server to create and start a Virtual Machine (VM) based on the disk data of the PM; a first dirty data generated by running of a program on the PM in a transmission process of the disk data of the PM is acquired; the disk data for creating the VM is updated based on the acquired first dirty data; and based on the updated disk data for the VM, the VM is controlled to resume running the program based on a progress of the program.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: January 30, 2024
    Assignee: XI'AN ZHONGXING NEW SOFTWARE CO., LTD.
    Inventors: Yao Tong, Hua Li, Guang Shen
  • Publication number: 20230379268
    Abstract: The present disclosure relates to the field of communication technology, and provides a resource scheduling method including: acquiring utilization rates of resources of a plurality of proxy servers, the plurality of proxy servers being deployed on a virtual machine; and using at least one first proxy server to share a utilization of resources of at least one second proxy server, where the utilization rate of resources of each of the at least one first proxy server is smaller than a first threshold, the utilization rate of resources of each of the at least one second proxy server is greater than a second threshold, and the first threshold is smaller than the second threshold.
    Type: Application
    Filed: September 15, 2021
    Publication date: November 23, 2023
    Inventors: Yao TONG, Haixin WANG
  • Publication number: 20230347561
    Abstract: A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
    Type: Application
    Filed: July 4, 2023
    Publication date: November 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Feng Weng, Ching-Hua Hsieh, Chung-Shi Liu, Chih-Wei Lin, Sheng-Hsiang Chiu, Yao-Tong Lai, Chia-Min Lin
  • Publication number: 20230267015
    Abstract: The present application provides a resource scheduling method and apparatus, an electronic device, and a computer readable storage medium. The method includes: selecting an optimal path from a pre-constructed resource label forest according to a weight of a path in a resource label tree in the resource label forest; and scheduling a task to a third node through which the optimal path passes. The resource label forest includes the at least one resource label tree, and each path of which includes a first node, a second node and the third node in an order from a root node to leaf nodes.
    Type: Application
    Filed: June 22, 2021
    Publication date: August 24, 2023
    Inventors: Yao TONG, Haixin WANG, Xi CHENG
  • Patent number: 11731327
    Abstract: A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: August 22, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Feng Weng, Ching-Hua Hsieh, Chung-Shi Liu, Chih-Wei Lin, Sheng-Hsiang Chiu, Yao-Tong Lai, Chia-Min Lin
  • Publication number: 20220362975
    Abstract: A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Feng Weng, Ching-Hua Hsieh, Chung-Shi Liu, Chih-Wei Lin, Sheng-Hsiang Chiu, Yao-Tong Lai, Chia-Min Lin
  • Patent number: 11446851
    Abstract: A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Feng Weng, Ching-Hua Hsieh, Chung-Shi Liu, Chih-Wei Lin, Sheng-Hsiang Chiu, Yao-Tong Lai, Chia-Min Lin
  • Publication number: 20220238407
    Abstract: Three-dimensional integrated circuit (3DIC) structures and methods of forming the same are provided. A 3DIC structure includes a semiconductor package, a first package substrate, a molded underfill layer and a thermal interface material. The semiconductor package is disposed over and electrically connected to the first package substrate through a plurality of first bumps. The semiconductor package includes at least one semiconductor die and an encapsulation layer aside the semiconductor die. The molded underfill layer surrounds the plurality of first bumps and a sidewall of the semiconductor package, and has a substantially planar top surface. The CTE of the molded underfill layer is different from the CTE of the encapsulation layer of the semiconductor package. The thermal interface material is disposed over the semiconductor package.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Min Lin, Ching-Hua Hsieh, Chih-Wei Lin, Sheng-Hsiang Chiu, Sheng-Feng Weng, Yao-Tong Lai
  • Patent number: 11309226
    Abstract: Three-dimensional integrated circuit (3DIC) structures and methods of forming the same are provided. A 3DIC structure includes a semiconductor package, a first package substrate, a molded underfill layer and a thermal interface material. The semiconductor package is disposed over and electrically connected to the first package substrate through a plurality of first bumps. The semiconductor package includes at least one semiconductor die and an encapsulation layer aside the semiconductor die. The molded underfill layer surrounds the plurality of first bumps and a sidewall of the semiconductor package, and has a substantially planar top surface. The CTE of the molded underfill layer is different from the CTE of the encapsulation layer of the semiconductor package. The thermal interface material is disposed over the semiconductor package.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: April 19, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Min Lin, Ching-Hua Hsieh, Chih-Wei Lin, Sheng-Hsiang Chiu, Sheng-Feng Weng, Yao-Tong Lai
  • Patent number: 11239197
    Abstract: A method for automatically threading wire in a wire bonding apparatus includes the steps of extending a wire tail of a wire from a wire spool, locating the wire tail in a wire locating device and positioning the wire tail at a straightening location of the wire locating device. The wire tail is straightened at the straightening location with a wire manipulating device and then conveyed to a threading location. With a wire threading device, the straightened wire tail is received at the threading location and is threaded through a capillary of the wire bonding apparatus.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: February 1, 2022
    Assignee: ASM TECHNOLOGY SINGAPORE PTE LTD
    Inventors: Keng Yew Song, Yue Zhang, Xiao Liang Chen, Yao Tong
  • Publication number: 20210262812
    Abstract: Online ride-hailing and invoice issuing methods, systems and apparatuses are provided. An example method comprises: receiving a first ride-hailing request from a user terminal, wherein the first ride-hailing request includes one or more transport capacity types, one or more online ride-hailing service providers providing the corresponding one or more transport capacity types, a start location and a destination location; sending one or more second ride-hailing requests to one or more online ride-hailing service platforms corresponding to the one or more online ride-hailing service providers according to the one or more transport capacity types and the one or more online ride-hailing service providers; receiving one or more second ride-hailing response messages returned by one or more of the one or more online ride-hailing service platforms; and returning a first ride-hailing message to the user terminal based on the second one or more ride-hailing response messages.
    Type: Application
    Filed: May 11, 2021
    Publication date: August 26, 2021
    Inventors: Shaohang YANG, Yao TONG, Guang YANG, Yonghao ZHANG, Linya ZHOU, Xinhua LI
  • Publication number: 20210193544
    Abstract: Three-dimensional integrated circuit (3DIC) structures and methods of forming the same are provided. A 3DIC structure includes a semiconductor package, a first package substrate, a molded underfill layer and a thermal interface material. The semiconductor package is disposed over and electrically connected to the first package substrate through a plurality of first bumps. The semiconductor package includes at least one semiconductor die and an encapsulation layer aside the semiconductor die. The molded underfill layer surrounds the plurality of first bumps and a sidewall of the semiconductor package, and has a substantially planar top surface. The CTE of the molded underfill layer is different from the CTE of the encapsulation layer of the semiconductor package. The thermal interface material is disposed over the semiconductor package.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 24, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Min Lin, Ching-Hua Hsieh, Chih-Wei Lin, Sheng-Hsiang Chiu, Sheng-Feng Weng, Yao-Tong Lai
  • Publication number: 20210159205
    Abstract: A method for automatically threading wire in a wire bonding apparatus includes the steps of extending a wire tail of a wire from a wire spool, locating the wire tail in a wire locating device and positioning the wire tail at a straightening location of the wire locating device. The wire tail is straightened at the straightening location with a wire manipulating device and then conveyed to a threading location. With a wire threading device, the straightened wire tail is received at the threading location and is threaded through a capillary of the wire bonding apparatus.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Inventors: Keng Yew SONG, Yue ZHANG, Xiao Liang CHEN, Yao TONG
  • Publication number: 20210019171
    Abstract: Disclosed are a Physical to Virtual (P2V) migration method and apparatus, and a storage medium. The method includes that: disk data of a Physical Machine (PM) is transmitted to a server, wherein the disk data is used by the server to create and start a Virtual Machine (VM) based on the disk data of the PM; a first dirty data generated by running of a program on the PM in a transmission process of the disk data of the PM is acquired; the disk data for creating the VM is updated based on the acquired first dirty data; and based on the updated disk data for the VM, the VM is controlled to resume running the program based on a progress of the program.
    Type: Application
    Filed: April 2, 2019
    Publication date: January 21, 2021
    Inventors: Yao TONG, Hua LI, Guang SHEN
  • Publication number: 20200338796
    Abstract: A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
    Type: Application
    Filed: April 29, 2019
    Publication date: October 29, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Feng Weng, Ching-Hua Hsieh, Chung-Shi Liu, Chih-Wei Lin, Sheng-Hsiang Chiu, Yao-Tong Lai, Chia-Min Lin
  • Patent number: 10713369
    Abstract: The disclosure discloses a method and device for access control. The method includes: when a group of tasks are executed, controlling an access of a subject to an object according to operation permission corresponding to each of the tasks in the group of tasks. The device comprises a control component arranged to, when a group of tasks are executed, control an access of a subject to an object according to operation permission corresponding to each of the tasks in the group of tasks.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: July 14, 2020
    Assignee: ZTE CORPORATION
    Inventors: Yao Tong, Yihui Peng
  • Publication number: 20190139787
    Abstract: An integrated fan-out (InFO) package includes at least one die, a plurality of conductive structures, an encapsulant, an enhancement layer, and a redistribution structure. The die has an active surface and includes a plurality of conductive posts on the active surface. The conductive structures surround the die. The encapsulant partially encapsulates the die. The enhancement layer is over the encapsulant. A top surface of the enhancement layer is substantially coplanar with top surfaces of the conductive posts and the conductive structures. A material of the enhancement layer is different from a material of the encapsulant. A roughness of an interface between the encapsulant and the enhancement layer is larger than a roughness of the top surface of the enhancement layer. The redistribution structure is over the enhancement layer and is electrically connected to the conductive structures and the die.
    Type: Application
    Filed: December 5, 2017
    Publication date: May 9, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Tse Chen, Ching-Hua Hsieh, Chung-Shi Liu, Chih-Wei Lin, Sheng-Hsiang Chiu, Yao-Tong Lai
  • Patent number: 10283377
    Abstract: An integrated fan-out (InFO) package includes at least one die, a plurality of conductive structures, an encapsulant, an enhancement layer, and a redistribution structure. The die has an active surface and includes a plurality of conductive posts on the active surface. The conductive structures surround the die. The encapsulant partially encapsulates the die. The enhancement layer is over the encapsulant. A top surface of the enhancement layer is substantially coplanar with top surfaces of the conductive posts and the conductive structures. A material of the enhancement layer is different from a material of the encapsulant. A roughness of an interface between the encapsulant and the enhancement layer is larger than a roughness of the top surface of the enhancement layer. The redistribution structure is over the enhancement layer and is electrically connected to the conductive structures and the die.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: May 7, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Tse Chen, Ching-Hua Hsieh, Chung-Shi Liu, Chih-Wei Lin, Sheng-Hsiang Chiu, Yao-Tong Lai
  • Publication number: 20170277900
    Abstract: The disclosure discloses a method and device for access control. The method includes: when a group of tasks are executed, controlling an access of a subject to an object according to operation permission corresponding to each of the tasks in the group of tasks. The device comprises a control component arranged to, when a group of tasks are executed, control an access of a subject to an object according to operation permission corresponding to each of the tasks in the group of tasks.
    Type: Application
    Filed: April 17, 2015
    Publication date: September 28, 2017
    Inventors: Yao TONG, Yihui PENG