Patents by Inventor Yaohua Yang

Yaohua Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11971878
    Abstract: Systems and methods for supporting both batch processing and streaming data applications, to load and process data incrementally, while providing a near-constantly materialized dataset based on raw blockchain data, are described. For example, the system may receive first on-chain data in a first format via a first input stream, wherein the first on-chain data originates from a blockchain node of a blockchain network. The system may transform the first on-chain data to a second format for storage in a second dataset, wherein the second format comprises an unbounded table.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 30, 2024
    Assignee: Coinbase, Inc.
    Inventors: Jie Zhang, Zhicong Liang, Yaohua Yang, David Lai, Chaoqing Lu, Jinghan Xu, Xu Meng
  • Publication number: 20240132152
    Abstract: The present disclosure provides a self-learning collaborative control method for active steering and yaw moment for a motor vehicle, including a first step of constructing fundamental formulas which are stored in a vehicle ECU, and a second step of calculating an active steering angle ?C and a yaw moment Mc on line by the vehicle ECU according to following sub-steps during a driving process of the motor vehicle, and controlling a driving state of the motor vehicle according to ?C and Mc. The second step includes a first sub-step of collecting raw real-time parameter values, a second sub-step of performing calculation by the identifier and the control target reference model, a third sub-step of calculating ?C and Mc. The present disclosure can realize the self-learning collaborative control of active steering and yaw moment without requiring a system control model and correct a driver's steering operation.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 25, 2024
    Inventors: Zhijun Fu, Yaohua Guo, Dengfeng Zhao, Jinquan Ding, Chaohui Liu, Wenbin He, Wenchao Yang, Lei Yao, Fang Zhou, Hui Wang, Wuyi Ming
  • Patent number: 11954114
    Abstract: Systems and methods for a unified approach that is compatible with all blockchains, protocols, etc. The systems and methods use a bifurcated indexing system with a dynamically selected application service. The systems and methods bifurcate the indexing process into a storage layer and a compute layer.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 9, 2024
    Assignee: Coinbase, Inc.
    Inventors: Jie Zhang, Zhicong Liang, Yaohua Yang, David Lai, Chaoqing Lu, Jinghan Xu, Xu Meng
  • Patent number: 11955735
    Abstract: A four-notch flexible wearable ultra-wideband antenna fed by coplanar waveguide, includes a flexible base. A ground plane, a radiation patch and a feeder are arranged on the flexible base. There are several resonant tanks on the feeder and the radiation patch. The flexible base is made of insulating flexible material, and the feeder, the radiation patch and the ground plane are made of conductive flexible material. The four-notch flexible wearable ultra-wideband antenna fed by coplanar waveguide of the present application can be prepared by layer-by-layer assembly technology, spray printing or printed circuit board technology, and has the advantages of miniaturization and low profile, compact structure, convenient production, good conformality, wearable and other advantages.
    Type: Grant
    Filed: December 31, 2021
    Date of Patent: April 9, 2024
    Assignee: ANHUI UNIVERSITY
    Inventors: Xiaohui Guo, Pengbin Gui, Siliang Wang, Liangpan Yang, Zhiliang Chen, Wei Zeng, Lixia Yang, Yaohua Xu, Zhixiang Haung
  • Patent number: 11945076
    Abstract: An article (100) has a polyester film backing (110) and a primer layer (120) including a carboxylated styrene butadiene copolymer crosslinked with a polyfunctional aziridine disposed on a major surface of the polyester film backing (110). Another article includes a polyester backing (110), a primer layer (120) including a carboxylated styrene butadiene copolymer crosslinked with a polyfunctional aziridine disposed on a major surface of the polyester backing (110), and a phenolic layer (140) disposed on the primer layer (120) on a surface opposite the polyester backing (110). The phenolic layer (120) can include abrasive particles (160). Processes for making the articles are also described, as well as methods for abrading a workpiece and improving adhesion between a polyester film backing (110) and a phenolic layer (120) on the polyester backing (110).
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: April 2, 2024
    Assignee: 3M Innovative Properties Company
    Inventors: Amelia W. Koenig, Liming Song, Stephen M. Sanocki, Yu Yang, Yaohua Gao, Aniruddha A. Upadhye, Morgan A. Priolo, Saurabh Batra, Angela S. McLean
  • Publication number: 20240107757
    Abstract: Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.
    Type: Application
    Filed: December 8, 2023
    Publication date: March 28, 2024
    Inventors: Jia He, Haihui Huang, Fandong Liu, Yaohua Yang, Peizhen Hong, Zhiliang Xia, Zongliang Huo, Yaobin Feng, Baoyou Chen, Qingchen Cao
  • Publication number: 20240079825
    Abstract: Connectors for use with high-speed signals. Mating connectors may include interlocking components that control the mated position of the connectors such that wipe distance can be reduced. These components may be compact such that they can be integrated into connectors with standardized exterior dimensions. They may be integrated into mating guides of the mating connectors. For one of the mating connectors, such a component may be a locking member disposed in and curving out of its guide such that the locking member mates with a matching feature of a component in the guide of the other connector. As the connectors are secured by these components, the conductive elements may be shorter than the lengths required by standards, which reduces the stub and therefore increases signal integrity. Such a configuration provides higher signal integrity at higher speeds, while conforming to standards that constrain mating and mounting interfaces.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 7, 2024
    Applicant: Amphenol Commercial Products (Chengdu) Co., Ltd.
    Inventors: Kui Yang, Xiaodong Hu, Yaohua Hou
  • Patent number: 11914560
    Abstract: Systems and methods for creating a reorganization-immune blockchain index using mono-increasing sequence records are described. For example, the system may receive on-chain data for a plurality of blocks, wherein the plurality of blocks comprises a first block comprising a first event of a plurality of blockchain events within the on-chain data. The system may determine a first sequence number for the first event, wherein the first sequence number is based on a mono-increasing sequence record.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 27, 2024
    Assignee: Coinbase, Inc.
    Inventors: Jie Zhang, Zhicong Liang, Yaohua Yang, David Lai, Chaoqing Lu, Jinghan Xu, Xu Meng
  • Patent number: 11903195
    Abstract: Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: February 13, 2024
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Jia He, Haihui Huang, Fandong Liu, Yaohua Yang, Peizhen Hong, Zhiliang Xia, Zongliang Huo, Yaobin Feng, Baoyou Chen, Qingchen Cao
  • Publication number: 20240007525
    Abstract: Systems and methods for a unified approach that is compatible with all blockchains, protocols, etc. The systems and methods use a bifurcated indexing system with a dynamically selected application service. The systems and methods bifurcate the indexing process into a storage layer and a compute layer.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Coinbase, Inc.
    Inventors: Jie ZHANG, Zhicong LIANG, Yaohua YANG, David LAI, Chaoqing LU, Jinghan XU, Xu MENG
  • Publication number: 20240004851
    Abstract: Systems and methods for creating a reorganization-immune blockchain index using mono-increasing sequence records are described. For example, the system may receive on-chain data for a plurality of blocks, wherein the plurality of blocks comprises a first block comprising a first event of a plurality of blockchain events within the on-chain data. The system may determine a first sequence number for the first event, wherein the first sequence number is based on a mono-increasing sequence record.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Coinbase, Inc.
    Inventors: Jie ZHANG, Zhicong LIANG, Yaohua YANG, David LAI, Chaoqing LU, Jinghan XU, Xu MENG
  • Publication number: 20240004894
    Abstract: Systems and methods for a unified approach that is compatible with all blockchains, protocols, etc. The systems and methods use a bifurcated indexing system with a dynamically selected application service. The systems and methods bifurcate the indexing process into a storage layer and a compute layer.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Coinbase, Inc.
    Inventors: Jie ZHANG, Zhicong LIANG, Yaohua YANG, David LAI, Chaoqing LU, Jinghan XU, Xu MENG
  • Publication number: 20240004866
    Abstract: Systems and methods for supporting both batch processing and streaming data applications, to load and process data incrementally, while providing a near-constantly materialized dataset based on raw blockchain data, are described. For example, the system may receive first on-chain data in a first format via a first input stream, wherein the first on-chain data originates from a blockchain node of a blockchain network. The system may transform the first on-chain data to a second format for storage in a second dataset, wherein the second format comprises an unbounded table.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Coinbase, Inc.
    Inventors: Jie ZHANG, Zhicong LIANG, Yaohua YANG, David LAI, Chaoqing LU, Jinghan XU, Xu MENG
  • Publication number: 20230413560
    Abstract: A memory device includes a substrate, a stack over the substrate, and a gate line slit extending along a first direction and dividing the stack into two portions. The stack includes a connection portion that connects the two portions of the stack. The connection portion includes at least two sub-connection portions along a second direction perpendicular to the first direction. The gate line slit includes at least two portions along the first direction. Each sub-connection portion is between adjacent two portions of the gate line slit.
    Type: Application
    Filed: August 22, 2023
    Publication date: December 21, 2023
    Inventors: Qiang Xu, Fandong Liu, Zongliang Huo, Zhiliang Xia, Yaohua Yang, Peizhen Hong, Wenyu Hua, Jia He
  • Patent number: 11792989
    Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device comprises a substrate, a stack structure on the substrate, and at least one gate line slit extending along a first direction substantially parallel to a top surface of the substrate, and dividing the stack structure into at least two portions. The stack structure includes at least one connection portion that divides the at least one gate line slit, and conductively connects the at least two portions.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: October 17, 2023
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Qiang Xu, Fandong Liu, Zongliang Huo, Zhiliang Xia, Yaohua Yang, Peizhen Hong, Wenyu Hua, Jia He
  • Publication number: 20230157020
    Abstract: Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.
    Type: Application
    Filed: January 19, 2023
    Publication date: May 18, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Jia HE, Haihui HUANG, Fandong LIU, Yaohua YANG, Peizhen HONG, Zhiliang XIA, Zongliang HUO, Yaobin FENG, Baoyou CHEN, Qingchen CAO
  • Publication number: 20230068066
    Abstract: The present disclosure generally relates to a reactor, in particular to a multiphase interface reactor applicable to chemistry, chemical industry, food, medicine, cosmetics and other fields. The reactor comprises a reaction cylinder; at least one feed port opened in the reaction cylinder; a stirring device, at least a part of the stirring device being located inside the reaction cylinder; at least one cylinder including a first cylinder and a second cylinder, wherein, the reaction cylinder, the first cylinder, and the second cylinder communicate with each other; an annular space is formed between the reaction cylinder and the second cylinder, so that at least part of a reaction product is allowed to enter the annular space from the reaction cylinder, and enter the first cylinder from the annular space; and at least one discharge port arranged on the first cylinder.
    Type: Application
    Filed: October 28, 2022
    Publication date: March 2, 2023
    Applicant: LANZHOU LANSHI ZHONGKE NANOTECHNOLOGY CO., LTD.
    Inventors: He YAO, Neng ZENG, Hongling DING, Xiaogang HOU, Benyi SHI, Jiancang LI, Yaohua YANG
  • Patent number: 11574919
    Abstract: Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: February 7, 2023
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Jia He, Haihui Huang, Fandong Liu, Yaohua Yang, Peizhen Hong, Zhiliang Xia, Zongliang Huo, Yaobin Feng, Baoyou Chen, Qingchen Cao
  • Publication number: 20220059564
    Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the memory device comprises a substrate, a stack structure on the substrate, and at least one gate line slit extending along a first direction substantially parallel to a top surface of the substrate, and dividing the stack structure into at least two portions. The stack structure includes at least one connection portion that divides the at least one gate line slit, and conductively connects the at least two portions.
    Type: Application
    Filed: October 25, 2021
    Publication date: February 24, 2022
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Qiang XU, Fandong LIU, Zongliang HUO, Zhiliang XIA, Yaohua YANG, Peizhen HONG, Wenyu HUA, Jia HE
  • Patent number: 11222903
    Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the method comprises: providing a substrate; forming an alternating stack over the substrate, the alternating stack comprising a plurality of tiers of sacrificial layer/insulating layer pairs extending along a first direction substantially parallel to a top surface of the substrate; forming a plurality of tiers of word lines extending along the first direction based on the alternating stack; forming at least one connection portion conductively connecting two or more of the word lines of the plurality of tiers of word lines; and forming at least one metal contact via conductively shared by connected word lines, the at least one metal contact via being connected to at least one metal interconnect.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: January 11, 2022
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Qiang Xu, Fandong Liu, Zongliang Huo, Zhiliang Xia, Yaohua Yang, Peizhen Hong, Wenyu Hua, Jia He