Abstract: A pixel circuit having improved charge transfer including an amplifier having an input node electrically connected to a charge storage node of the pixel circuit, and a negative feedback control loop having a capacitance element electrically connected between the input node and an output node of said amplifier.

Abstract: A system for controlling power applied to pixels in an imager. A first switch coupling the internal power node of the pixels to the power supply of the imager. A second switch coupling the internal power node of the pixels to a ground potential or low potential. The first and second switches are controlled complimentary to each other during integration and readout of the pixels. A third switch providing a high impedance mode where the internal power node and n+ guard ring are isolated from the operating and ground potentials.

Abstract: An imager and method of operating an imager employing multi-column shared readout circuitry. Columns of a pixel array are organized into groups, each group having a respective multi-column shared readout circuit. The columns of each group are readout serially but in parallel with the columns of other groups. Each multi-column shared readout circuit may comprise a black level correction clamp, a multi-column analog gain amplifier, a analog-to-digital converter, a digital offset correction block, and a digital gain calibration block. A single-column analog gain amplifier may amplify an analog pixel signal value of each column prior to processing by a respective multi-column shared readout circuit.

Abstract: Systems and methods for providing one or more reference currents with respective negative temperature coefficients are provided. A first voltage is divided to provide a divided voltage, which is compared to a reference voltage (e.g., a bandgap reference voltage) to provide a control voltage. The first voltage and the one or more reference currents are based on the control voltage.

Abstract: A VLN biasing scheme implemented in an image sensor with top/bottom readout. A first and second current sink coupled to the top of a first column of pixels and a second column of pixels respectively. A third and fourth current sink coupled to the bottom of a first column of pixels and a second column of pixels respectively. During column readout, each current sink sinks an equal amount of current.

Abstract: An imaging device and method for operating the device. The imaging device comprises a pixel array that comprises a plurality of imaging pixels and dark reference pixels arranged in columns and rows. The dark reference pixels produce a noise signal that is subtracted from a pixel signal produced by the imaging pixels to correct row noise. In addition, the imaging device may comprise a hot pixel filtering circuit that blocks the output from hot pixels.

Abstract: Methods and apparatuses providing pixel-wise noise correction using pixels to provide reference values during pixel readout operations.

Abstract: Methods and apparatuses for row-wise dark level non-uniformity compensation of imaging sensor pixel signals. A column dependent dark reference value is determined as one of a linear and parabolic function of signal values from two areas of dark reference pixels and a column location and then used for dark level non-uniformity compensation of signal values from imaging pixels.

Abstract: Systems, imagers, amplifiers and methods for use in operating a multi-channel amplifier. The multi-channel amplifier operates in a plurality of channels. A respective plurality of non-overlapping clock signals is generated for connecting a shared operational amplifier into respective portions of a switched-capacitor amplifier circuit. Between assertions of the non-overlapping clock signals, the shared operational amplifier is substantially electrically isolated from the switched-capacitor amplifier circuit to remove current leakage paths. Inputs and outputs of the shared operational amplifier are shorted to remove residual charge from the circuit.

Abstract: An imager and method of operating an imager employing multi-column shared readout circuitry. Columns of a pixel array are organized into groups, each group having a respective multi-column shared readout circuit. The columns of each group are readout serially but in parallel with the columns of other groups. Each multi-column shared readout circuit may comprise a black level correction clamp, a multi-column analog gain amplifier, a analog-to-digital converter, a digital offset correction block, and a digital gain calibration block. A single-column analog gain amplifier may amplify an analog pixel signal value of each column prior to processing by a respective multi-column shared readout circuit.