Patents by Inventor Yasuaki Komatsu

Yasuaki Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11209471
    Abstract: A measurement system and a method of removing effects of instability of the measurement system while measuring at least one S-parameter of a device under test (DUT) are provided. The method includes initially determining a characteristic of the measurement system, including identifying a location of an instability in the time domain of the measurement system; determining a change of the characteristic of the measurement system while connected to the DUT; and compensating for the determined change of the characteristic of the measurement system while connected to the DUT by removing effects of the determined change on measurements of the at least one S-parameter of the DUT.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: December 28, 2021
    Assignee: Keysight Technologies, Inc.
    Inventors: Joel P. Dunsmore, Gen Tokumoto, Yasuaki Komatsu
  • Publication number: 20210341526
    Abstract: A measurement system and a method of removing effects of instability of the measurement system while measuring at least one S-parameter of a device under test (DUT) are provided. The method includes initially determining a characteristic of the measurement system, including identifying a location of an instability in the time domain of the measurement system; determining a change of the characteristic of the measurement system while connected to the DUT; and compensating for the determined change of the characteristic of the measurement system while connected to the DUT by removing effects of the determined change on measurements of the at least one S-parameter of the DUT.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 4, 2021
    Inventors: Joel P. Dunsmore, Gen Tokumoto, Yasuaki Komatsu
  • Patent number: 7474975
    Abstract: Making use of the values of error items quantified during full n-port calibration, an indicator of whether or not all calibration steps have been uniformly conducted (calibration consistency) is calculated and the result of the calibration is confirmed based on this indicator.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: January 6, 2009
    Assignee: Agilent Technologies, Inc.
    Inventor: Yasuaki Komatsu
  • Patent number: 7415373
    Abstract: A method for measuring a frequency translation device under test by using a vector network analyzer and a reference frequency translation device that includes measuring the network characteristics of the reference frequency translation device by using the vector network analyzer, measuring the network characteristics of a circuit including the reference frequency translation device and the frequency translation device under test by using the vector network where the reference frequency translation device has an operation complementary to the frequency translation device under test, and removing the network characteristics of the reference frequency translation device from the measured network characteristics of the circuit.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: August 19, 2008
    Assignee: Agilent Technologies, Inc.
    Inventors: Haruhiko Yanamaka, Yasuaki Komatsu
  • Patent number: 7298158
    Abstract: A network analyzing apparatus that analyzes the network properties of a device under test by applying reference signals to a device under test by frequency sweeping or power sweeping comprises input device for inputting the sweep range and sweep interval of these reference signals as well as the center coordinates and radius of a test circle for testing this device under test; a measurement apparatus for measuring the network properties of this device under test and obtaining measurements for n number of measurement points determined from this sweep range and sweep interval; and a testing apparatus, with this testing apparatus finding the difference between this measurement and center coordinates and, referring to this difference and this radius, determining that this measurement that has been read passes the test if the magnitude of this referred difference is no greater than this referred radius, or is less than this referred radius.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: November 20, 2007
    Assignee: Agilent Technologies, Inc.
    Inventor: Yasuaki Komatsu
  • Publication number: 20070233410
    Abstract: Making use of the values of error items quantified during full n-port calibration, an indicator of whether or not all calibration steps have been uniformly conducted (calibration consistency) is calculated and the result of the calibration is confirmed based on this indicator.
    Type: Application
    Filed: March 13, 2007
    Publication date: October 4, 2007
    Inventor: Yasuaki Komatsu
  • Publication number: 20060004919
    Abstract: A method for measuring a frequency translation device under test by using a vector network analyzer and a reference frequency translation device comprises: measuring the network characteristics of the abovementioned reference frequency translation device by using the abovementioned vector network analyzer, measuring the network characteristics of a circuit comprised of the abovementioned reference frequency translation device and the abovementioned frequency translation device under test using the abovementioned vector network analyzer, wherein the abovementioned reference frequency translation device has an operation complementary to the abovementioned frequency translation device under test, and removing the network characteristics of the abovementioned reference frequency translation device from the measured network characteristics of the abovementioned circuit.
    Type: Application
    Filed: June 23, 2005
    Publication date: January 5, 2006
    Inventors: Haruhiko Yanamaka, Yasuaki Komatsu
  • Publication number: 20050140377
    Abstract: Making use of the values of error items quantified during full n-port calibration, an indicator of whether or not all calibration steps have been uniformly conducted (calibration consistency) is calculated and the result of the calibration is confirmed based on this indicator.
    Type: Application
    Filed: November 8, 2004
    Publication date: June 30, 2005
    Inventor: Yasuaki Komatsu
  • Publication number: 20040249605
    Abstract: A network analyzing apparatus that analyzes the network properties of a device under test by applying reference signals to a device under test by frequency sweeping or power sweeping comprises input device for inputting the sweep range and sweep interval of these reference signals as well as the center coordinates and radius of a test circle for testing this device under test; a measurement apparatus for measuring the network properties of this device under test and obtaining measurements for n number of measurement points determined from this sweep range and sweep interval; and a testing apparatus, with this testing apparatus finding the difference between this measurement and center coordinates and, referring to this difference and this radius, determining that this measurement that has been read passes the test if the magnitude of this referred difference is no greater than this referred radius, or is less than this referred radius.
    Type: Application
    Filed: May 25, 2004
    Publication date: December 9, 2004
    Applicant: AGILENT TECHNOLOGIES, INC.
    Inventor: Yasuaki Komatsu
  • Patent number: 5754067
    Abstract: A non-integer frequency divider is provided that can perform switching of a frequency division ratio setting at high speed in order to improve the phase noise of frequency synthesizers and raise their response speeds. The frequency divider is a non-integer frequency divider that performs frequency division with frequency division ratios that contain decimal fraction, and includes a first frequency divider which can be set to a number of integer frequency division ratios; a second frequency divider (i.e., a shift register); a bit selector; a CA value generator; and a .SIGMA..DELTA. modulator. Non-integer frequency division is realized by switching the settings of the frequency division ratio and the period number of the frequency division output signal of the first frequency divider and the setting of the frequency division ratio of the second frequency divider.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: May 19, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Yasuaki Komatsu, Yoshiyuki Yanagimoto
  • Patent number: 5600249
    Abstract: An impedance meter enables a real value of a component's impedance value to be forced to be negative when contact between measurement terminals and the component is poor. The value of the real part of the measured value is compared with a standard value for judging whether the contact is good or bad. The contact is judged poor when the real part of the measured value is more negative than the standard value. The standard value for judging whether the contact is good or bad is made more negative than the magnitude of the dispersion of the real part of the measured values, and thus erroneous judgments due to dispersion of measured values are eliminated. The circuit that forces the real part of the measured value to become negative is formed as follows: the input of an inverse gain amplifier is connected to the output terminal of a signal generator, the output of the inverse gain amplifier is connected to a high-voltage voltage terminal through a resistance.
    Type: Grant
    Filed: June 14, 1995
    Date of Patent: February 4, 1997
    Assignee: Hewlett-Packard Company
    Inventors: Kazuyuki Yagi, Yasuaki Komatsu, Masahiro Ikeda
  • Patent number: 5508617
    Abstract: The current invention is directed to a method of measuring an electric power and in particular to a precise power measurement by measuring a current and a voltage of high-frequency distortion waves. The current power measuring method is based upon a summation of the power values measured for every frequency component of the distortion wave. After being frequency converted in a mixer 5, a voltage is inputted from an input terminal 1 through a voltage amplifier 3 to a vector voltmeter 7. A current is supplied into an input terminal 2, and converted into a voltage signal by a current-to-voltage converter 4. Then, the voltage signal is frequency-converted in a mixer 6, and thereafter inputted into a vector voltmeter 8. The input signals to the mixers 5 and 6 are separated into frequency components by sweeping of a local signal generator 10, which are measured by the vector voltmeters.
    Type: Grant
    Filed: March 16, 1994
    Date of Patent: April 16, 1996
    Assignee: Hewlett-Packard Company
    Inventor: Yasuaki Komatsu
  • Patent number: 5416470
    Abstract: The contact between a device under test (DUT) and a measuring terminal is accurately judged with a simple circuit for impedance measurement. The conduction detecting means injects a judging current into the voltage terminal (L.sub.P) for low voltage. When the device under test (DUT) and both the current terminal (L.sub.C) for low voltage and the voltage terminal (L.sub.P) for low voltage are normally contacted with each other, since the inverting input terminal of the inverting amplifier is virtually grounded, and the L.sub.C and L.sub.P are substantially kept at the ground potential, the contact judgment for L.sub.C and L.sub.P is made by detecting the potentials of L.sub.P. In addition, when the impedance measurement value is larger than the predetermined lowest limit value and the current measurement value is lower than the predetermined lowest limit value, the DUT and the current terminal (H.sub.C) for high voltage are considered to have improper contact with each other.
    Type: Grant
    Filed: October 27, 1992
    Date of Patent: May 16, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Hideshi Tanaka, Yasuaki Komatsu, Nobuhiro Shitara, Naoko Ohtomo
  • Patent number: 4885528
    Abstract: The present invention relates to apparatus for measuring the AC electrical parameters of a circuit element (Device-Under-Test, DUT), such as a resistor, a capacitor or an inductor, at the desired frequency of a signal while applying a DC bias to the DUT. The present invention provides an apparatus capable of measurement with less error even in the lower-frequency range.
    Type: Grant
    Filed: March 3, 1989
    Date of Patent: December 5, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Hideshi Tanaka, Kazuyuki Yagi, Shigeru Tanimoto, Yasuaki Komatsu, Koichi Yanagawa, Yoichi Kuboyama