Patents by Inventor Yasufumi KAWAI

Yasufumi KAWAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160065168
    Abstract: A resonance coupler according to one aspect of the present disclosure includes first resonance wiring and second resonance wiring. The first resonance wiring includes first open loop wiring, first input/output wiring extending outwardly from a first connection portion of the first open loop wiring, and first stub wiring extending inwardly from a second connection portion of the first open loop wiring. The second resonance wiring includes second open loop wiring, and second input/output wiring extending outwardly from a third connection portion of the second open loop wiring. The first stub wiring includes a first connection end connected to the second connection portion and a first open end on an opposite side. A wiring length from the first connection portion to the first open end is one-quarter of a wavelength of an nth-order harmonic of a radio-frequency signal, where n is an integer not less than 2.
    Type: Application
    Filed: August 10, 2015
    Publication date: March 3, 2016
    Inventors: YASUFUMI KAWAI, SHUICHI NAGAI
  • Publication number: 20150234417
    Abstract: A gate drive circuit includes: a modulation circuit that generates a first modulated signal and a second modulated signal; an isolator including a first electromagnetic resonance coupler that isolatedly transmits the first modulated signal, and a second electromagnetic resonance coupler that isolatedly transmits the second modulated signal; a first rectifier circuit that generates a first signal by rectifying the first modulated signal; a second rectifier circuit that generates a second signal by rectifying at least a part of the second modulated signal; a third rectifier circuit that generates charging voltage by rectifying a second radio-frequency wave; a capacitor that charges a charge in accordance with the charging voltage; and an output circuit which selects whether or not to supply the charge charged in the capacitor to a gate terminal of the semiconductor switch, in accordance with at least one of the first signal and the second signal.
    Type: Application
    Filed: May 1, 2015
    Publication date: August 20, 2015
    Inventors: YASUFUMI KAWAI, SHUICHI NAGAI
  • Publication number: 20150222263
    Abstract: A gate drive circuit in an aspect of the present disclosure includes a modulated signal generation circuit that generates a first modulated signal, a first isolator that isolatedly transmits the first modulated signal, and a first rectifier circuit that generates a first output signal by rectifying the first modulated signal. The first modulated signal includes a first amplitude, a second amplitude larger than the first amplitude, and a third amplitude larger than the second amplitude. The first output signal includes a first output voltage value according to the first amplitude, a second output voltage value according to the second amplitude, and a third output voltage value according to the third amplitude.
    Type: Application
    Filed: April 19, 2015
    Publication date: August 6, 2015
    Inventors: SHUICHI NAGAI, YASUFUMI KAWAI, DAISUKE UEDA
  • Publication number: 20150222306
    Abstract: A radio-frequency signal reception circuit that detects an input signal includes an input reference terminal, a first input terminal into which a first input signal is input, a second input terminal into which a second input signal is input, an output terminal and output reference terminal from which an output signal is output, a first detector circuit that detects the first input signal and outputs a first output signal, which is a positive-voltage pulse signal, to the output terminal, a second detector circuit that detects the second input signal and outputs a second output signal, which is a positive-voltage pulse signal, to the output reference terminal, and a transistor connected to the input reference terminal and output reference terminal. The input signal includes the first input signal and second input signal. The output signal includes the first output signal and second output signal.
    Type: Application
    Filed: April 15, 2015
    Publication date: August 6, 2015
    Inventors: SHUICHI NAGAI, YASUFUMI KAWAI
  • Patent number: 8536948
    Abstract: A power amplifier according to the present invention includes: an input-side transformer which has an annular primary coil which is a first metal line and a plurality of linear secondary coils which are second metal lines, and matches input impedance and divides the input signal into a plurality of split signals; push-pull amplifiers each including a pair of transistors for amplifying one of the split signals; and an output-side transformer which has an annular secondary coil which is a third metal line and a plurality of linear primary coils which are fourth metal lines, and combines the amplified split signals and matches output impedance, two input terminals of the pair of transistors being connected to each other via each of the second metal lines and two output terminal of the pair of transistors being connected to each other via each of the fourth metal lines.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: September 17, 2013
    Assignee: Panasonic Corporation
    Inventors: Yasufumi Kawai, Hiroyuki Sakai
  • Patent number: 8492895
    Abstract: A semiconductor chip such as an MMIC is provided. The semiconductor chip has: a Si semiconductor as a substrate; and a low-loss transmission line, and can be easily connected to a circuit board on which the semiconductor chip is to be mounted and can ensure a stable GND potential. The semiconductor chip is a flip-chip semiconductor chip, and includes: a Si substrate; an integrated circuit manufactured on a main surface of the substrate; a dielectric film formed above the integrated circuit; and a conductor film for grounding formed on an upper surface of the dielectric film. The integrated circuit includes a wiring layer including a signal line which transmits signals for the integrated circuit. The signal line, the dielectric film, and the conductor film constitute a microstrip line.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: July 23, 2013
    Assignee: Panasonic Corporation
    Inventors: Hiroyuki Sakai, Takeshi Fukuda, Shinji Ujita, Yasufumi Kawai
  • Publication number: 20110291271
    Abstract: A semiconductor chip such as an MMIC is provided. The semiconductor chip has: a Si semiconductor as a substrate; and a low-loss transmission line, and can be easily connected to a circuit board on which the semiconductor chip is to be mounted and can ensure a stable GND potential. The semiconductor chip is a flip-chip semiconductor chip, and includes: a Si substrate; an integrated circuit manufactured on a main surface of the substrate; a dielectric film formed above the integrated circuit; and a conductor film for grounding formed on an upper surface of the dielectric film. The integrated circuit includes a wiring layer including a signal line which transmits signals for the integrated circuit. The signal line, the dielectric film, and the conductor film constitute a microstrip line.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Hiroyuki SAKAI, Takeshi FUKUDA, Shinji UJITA, Yasufumi KAWAI