Patents by Inventor Yasuharu Shimeki
Yasuharu Shimeki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6040825Abstract: An input/display integrated information processing device has: image display circuit for displaying document and image information; image input circuit through which information of an image such as a picture, a photograph, documents drawn or written on a sheet presented by the user can be an input; a visual coincidence structure for integrally combining a display screen of the image display circuit with an input screen of image input circuit so as to establish visual coincidence of screens as viewed from the user; contact information detection circuit for, when a finger of the user, the sheet presented by the user, or the like makes contact with the contact information detection circuit, detecting information of a contact position, the contact information detection circuit being disposed on the whole of the input screen of the image input circuit or the display screen of the image display circuit; image extraction circuit for automatically extracting only a required portion from image information input througType: GrantFiled: September 30, 1997Date of Patent: March 21, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroshi Yamamoto, Yasuharu Shimeki, Kazuhiro Kayashima, Susumu Maruno, Makoto Fujimoto, Yoshihiro Kojima
-
Patent number: 6041141Abstract: There is disclosed a character recognition machine adapted to recognize Japanese characters such as kanjis and kanas. The machine comprises a character string storage portion, a character extraction portion, a character recognition portion, and a language processing portion. A character string to be recognized is stored as an image in the storage portion. The character extraction portion comprises a network consisting a plurality of interconnected operators each of which has numerous inputs and outputs. An evaluation function which assumes its minimum value when a character extraction produces the best results is calculated by the operators simultaneously so as to minimize the value of the function. The character recognition portion calculates degrees of similarity of a character pattern to various character categories, the character pattern being applied from the character extraction portion.Type: GrantFiled: August 10, 1995Date of Patent: March 21, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroshi Yamamoto, Hisao Niwa, Yoshihiro Kojima, Susumu Maruno, Kazuhiro Kayashima, Toshiyuki Kouda, Hidetsugu Maekawa, Satoru Ito, Yasuharu Shimeki
-
Patent number: 5987170Abstract: There is disclosed a character recognition machine adapted to recognize Japanese characters such as kanjis and kanas. The machine comprises a character string storage portion, a character extraction portion, a character recognition portion, and a language processing portion. A character string to be recognized is stored as an image in the storage portion. The character extraction portion comprises a network consisting a plurality of interconnected operators each of which has numerous inputs and outputs. An evaluation function which assumes its minimum value when a character extraction produces the best results is calculated by the operators simultaneously so as to minimize the value of the function. The character recognition portion calculates degrees of similarity of a character pattern to various character categories, the character pattern being applied from the character extraction portion.Type: GrantFiled: November 6, 1997Date of Patent: November 16, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroshi Yamamoto, Hisao Niwa, Yoshihiro Kojima, Susumu Maruno, Kazuhiro Kayashima, Yasuharu Shimeki, Toshiyuki Kouda, Hidetsugu Maekawa, Satoru Ito
-
Patent number: 5742279Abstract: An input/display integrated information processing device has: image display circuit for displaying document and image information; image input circuit through which information of an image such as a picture, a photograph, documents drawn or written on a sheet presented by the user can be an input; a visual coincidence structure for integrally combining a display screen of the image display circuit with an input screen of the image input circuit so as to establish visual coincidence of screens as viewed from the user; contact information detection circuit for, when a finger of the user, the sheet presented by the user, or the like makes contact with the contact information detection circuit, detecting information of a contact position, the contact information detection circuit being disposed on the whole of the input screen of the image input circuit or the display screen of the image display circuit; image extraction circuit for automatically extracting only a required portion from image information input thType: GrantFiled: November 8, 1994Date of Patent: April 21, 1998Assignee: Matsushita Electrical Co., Ltd.Inventors: Hiroshi Yamamoto, Yasuharu Shimeki, Kazuhiro Kayashima, Susumu Maruno, Makoto Fujimoto, Yoshihiro Kojima
-
Patent number: 5703963Abstract: A character recognition apparatus is provided which, even when there occurs a local positional deviation of a character to be recognized, can stably recognize the character with high accuracy. For each contour point of a character image, a contouring direction code imparting unit 15 obtains a contouring direction code in which a contouring line direction of the character is quantized in four directions. A contouring direction code frequency calculation unit 16 calculates the frequency of each contouring direction code for each subregion of the character image. A contouring direction code density calculation unit 17 calculates the density of the contouring direction codes of each subregion, by using the frequency of the direction codes and the size of the respective subregion.Type: GrantFiled: October 31, 1994Date of Patent: December 30, 1997Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihiro Kojima, Hiroshi Yamamoto, Susumu Maruno, Yasuharu Shimeki
-
Patent number: 5689583Abstract: A character recognition unit recognizes a document image to output character candidates; a character correction unit selects a corrected character string which is correct with respect to grammar and vocabulary, from a set of character candidates from the character recognition unit; a keyword extraction unit extracts keywords of a document to be recognized, from the corrected character string; and wherein the character correction unit selects the corrected character string by a use of BUNSETSU evaluation representing correctness with respect to grammar and vocabulary, and an evaluation of the BUNSETSU is increased when the BUNSETSU has the keyword outputted from the keyword extraction unit.Type: GrantFiled: May 23, 1996Date of Patent: November 18, 1997Assignee: Matsushita Electric Industrial Co. Ltd.Inventors: Hisao Niwa, Kazuhiro Kayashima, Yasuharu Shimeki, Hidetsugu Maekawa
-
Patent number: 5689581Abstract: An inspection method for judging whether an object is defective or not uses a neural network comprising an input neuron which quantizes input feature quantities based on present quantization ranges, a plurality of intermediate neuron coupled to the input neuron with coupling coefficients determined from quantized feature quantities and a pair of output neurons coupled to respective intermediate neurons with intermediate coupling coefficients obtained by learning in which the intermediate coupling coefficients are initially set so that any object is judged to be defective and are fitted so that if an object is nondefective then it is judged to be nondefective by performing learning with use of nondefective objects.Type: GrantFiled: February 27, 1995Date of Patent: November 18, 1997Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masaya Nakao, Susumu Maruno, Yasuharu Shimeki
-
Patent number: 5542005Abstract: A recognition apparatus is provided with a plurality of recognition units organized in a multilayered hierarchical structure. Each of the recognition units includes a signal input section, a quantizer for performing a quantization according to a signal inputted from the signal input section, and a path selecting section for performing a selection of paths according to an output from the quantizer. The path selecting section includes a path input section having at least one path input terminal, a path output section having at least one path output terminal, a load distribution selecting section for selecting a load distribution, and a load setting section for changing the strength of connection between the path input terminal and the path output terminal according to the output of the quantizer by the use of the load distribution selected by the load distribution selecting section.Type: GrantFiled: March 13, 1995Date of Patent: July 30, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuharu Shimeki, Susumu Maruno, Toshiyuki Kohda, Shigeo Sakaue, Hiroshi Yamamoto, Yoshihiro Kojima
-
Patent number: 5530886Abstract: A recognizing and judging apparatus for a learning and recognizing processing to be effectively performed in a short period of time, the apparatus including a plurality of recognition units in a multi-layered hierarchical network structure with one or more path output terminals of the recognition units of an upper layer being connected with one or more path input terminals of the recognition units of a lower layer.Type: GrantFiled: February 27, 1995Date of Patent: June 25, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihiro Kojima, Susumu Maruno, Toshiyuki Kohda, Yasuharu Shimeki
-
Patent number: 5497448Abstract: The invention is a learning type waveform recognizer that has a sequential signal extractor that extracts changes in the values of an input waveform signal at each point on the transition axis, a learning and recognition section that learns the relations between the changes extracted from the input signal and classified waveform signals and recognizes the degree of matching with the classified waveform at each point on the transition axis based on the learned relations, and an integrated recognition section that integrates the recognized results at points in an interval and performs an overall judgment by identifying the waveform of the input waveform signal.Type: GrantFiled: March 23, 1995Date of Patent: March 5, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Susumu Maruno, Shigeo Sakaue, Yasuharu Shimeki
-
Patent number: 5479570Abstract: A learning and recognition machine has a major classification section for classifying an input pattern into a plurality of category groups and calculating a group belongingness to each category group and a plurality of fine classification sections for calculating a similarity within each category group. The machine causes the plurality of fine classification sections to learn in a coordinated manner by reflecting the group belongingness of the input pattern to update of a weight factor implemented in the fine classification sections, thereby allowing a recognition rate of a pattern situated at the boundary of the category groups to be improved and an effective supplemental learning to be performed.Type: GrantFiled: October 4, 1993Date of Patent: December 26, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Taro Imagawa, Toshiyuki Kouda, Yoshihiro Kojima, Susumu Maruno, Yasuharu Shimeki
-
Patent number: 5434869Abstract: A test pattern generating apparatus for generating test patterns to test a sequential circuit having at least one memory element. The apparatus calculates, in response to a primary input applied to the sequential circuit, analog logic values for signal lines in the sequential circuit using a nonlinear function, then stores history data for the analog logic values with an inverse covariance matrix of the analog logic values. The apparatus then calculates an evaluation value according to the degree of variance between the analog logic values and the history data. A primary input setting unit is used for producing a next primary input which provides a maximum evaluation value from the evaluation value obtained from the present primary input. inputs produced by the primary input setting unit.Type: GrantFiled: August 28, 1992Date of Patent: July 18, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hidetsugu Maekawa, Yasuharu Shimeki, Kazuhiro Kayashima, Hisao Niwa, Seiichi Shin
-
Patent number: 5384896Abstract: A learning machine with multi-input single-output circuits connected in hierachical structure, wherein product-sums of the output signals of input and output signal registers and the weights are obtained by the parallel processing of a plurality of product-sum computing units with a plurality of input and output signal registers being connected in cascades, thereby to render to scale down the circuit of the learning machine with the sigmoid function computing unit being one in number.Type: GrantFiled: October 22, 1993Date of Patent: January 24, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Sakaue, Toshiyuki Kohda, Hiroshi Yamamoto, Yasuharu Shimeki
-
Patent number: 5295228Abstract: A learning machine has plural multiple-input single-output signal processing circuits connected in a hierarchical structure. The learning machine sets a threshold value, which is a evaluation standard for change in weight coefficients, high during the early part of the learning process and enables rough learning to progress without changing the weight coefficients for those multiple-input single-output signal processing circuits for which errors are sufficiently small. On the other hand, the learning machine gradually reduces the threshold value as learning progresses and advances learning by a non-linear optimization method (including a conjugate gradient method, a linear search method, or a combination of conjugate gradient and linear search methods) during the later part of the learning process, and thereby improves the learning speed.Type: GrantFiled: September 4, 1991Date of Patent: March 15, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshiyuki Koda, Yasuharu Shimeki, Shigeo Sakaue, Hiroshi Yamamoto
-
Patent number: 5168550Abstract: An iterative learning machine uses, as a direction of changing iterative weight, a conjugate gradient direction in place of the conventional steepest descent direction, thereby saving time. Learning rates are set dynamically. Error calculation for plural learning rates, with respect to a certain weight changing direction, are accomplished by storing a product-sum of the input signals and weights in a hidden layer and a product-sum of the input signals and the weight changing direction in the hidden layer. When the learning falls into a non-effective state where further iteration does not effectively reduce an error, the weights are adjusted in order to restart the learning.Type: GrantFiled: February 20, 1990Date of Patent: December 1, 1992Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Sakaue, Toshiyuki Kohda, Yasuharu Shimeki, Hideyuki Takagi, Hayato Togawa
-
Patent number: 5129038Abstract: An improved iterative learning machine having a plurality of multi-input/single-output signal processing units connected in a hierarchical structure includes a weight coefficient change control unit which controls weight change quantities for those multi-input/single-output signal processing units having iteratively reduced errors thereby increasing the learning speed, contrary to conventional learning machines which perform a learning operation in order to minimize a square error of multi-input/single-output signal processing units in the highest hierarchy of the hierarchical structure.Type: GrantFiled: February 20, 1990Date of Patent: July 7, 1992Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshiyuki Kohda, Yasuharu Shimeki, Shigeo Sakaue, Hiroshi Yamamoto
-
Patent number: 4809087Abstract: In a magnetic recording and reproducing device having at least one rotating magnetic head for recording and reproducing video signal and digital form audio signal in a contiguous manner along each track which is inclined at an angle relative to the direction of travel of a magnetic tape, a discriminator signal is combined to the digital form audio signal. The discrimination signal has a first section carrying a check code and a second section carrying information. During the reproducing mode, the discrimination signal is detected such that the information carried in the second section is made invalid when the check code has a predetermined code pattern, and the information carried in the second section is made valid when the check code has a code pattern other than the predetermined code pattern. Furthermore, the check code is used to indicate the type of information contained in the second section.Type: GrantFiled: November 23, 1987Date of Patent: February 28, 1989Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuharu Shimeki, Hiroshi Matsushima, Masamitsu Ohtsu, Nobuyoshi Kihara
-
Patent number: 4660113Abstract: A magnetoresistive type thin film magnetic head is completely unaffected by external noise and produces only low interference with a recording medium. A magnetoresistive element which constitutes the thin film magnetic head has three terminals constituted by two end terminals and an intermediate terminal. Constant currents which flow in opposite directions are respectively supplied to the two end terminals. A magnetic field of a signal recorded on and reproduced from a single track of the recording medium is applied to the magnetoresistive element, and reproduction outputs of opposite phases appear at the two end terminals. These outputs are differentially amplified by a differential amplifier. Furthermore, the magnetoresistive element is biased by an induced magnetic anisotropy means in a predetermined direction.Type: GrantFiled: December 9, 1982Date of Patent: April 21, 1987Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Noboru Nomura, Yasuharu Shimeki
-
Patent number: 4549167Abstract: A method of encoding and decoding binary data, comprising the steps of: dividing the binary data into 2-bit data groups, converting each 2-bit data group into a 5-bit code having a minimum of 4 consecutive bits "0" between a bit "1" and the next bit "1", and converting reversely the encoded 5-bit codes into the original binary data with reference to another 5-bit codes located forwardly of and rearwardly of the 5-bit code. By employing this method, it becomes possible to obtain a density twice higher than that of "MFM" method.Type: GrantFiled: March 2, 1984Date of Patent: October 22, 1985Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Misao Kato, Yasuharu Shimeki, Hiroshi Matsushima, Kousou Takeuchi
-
Patent number: 4544962Abstract: A method is disclosed for processing binary data prior to magnetic recording. The binary data is divided into 4-bit data segments which are converted to 8-bit codes according to a predetermined encoding transfer function describing the relationships between the 4-bit data segments and corresponding 8-bit codes, wherein the bit pattern of each 8-bit code has an intra-code run-length of at least two "0" bits and forms an inter-code run-length of from at least two "0" bits to at most nine "0"bits with an adjacent 8-bit code. The method further includes the step of generating a frame synchronization code and interleaving it with 8-bit codes to form a frame of binary digits. The frame sync code has a bit pattern which is unduplicatable by any combination of 8-bit codes that follow.Type: GrantFiled: July 2, 1982Date of Patent: October 1, 1985Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Misao Kato, Yasuharu Shimeki, Hiroshi Matsushima, Shiro Tsuji, Nobuyoshi Kihara, Yoshinori Amano