Patents by Inventor Yasuhiko Kohno
Yasuhiko Kohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7777422Abstract: A DC/DC converter device according to the present invention includes a plurality of resonant DC/DC converters connected in parallel, and a timing control circuit driving the plurality of resonant DC/DC converters at substantially the same frequency with a phase shift.Type: GrantFiled: May 31, 2006Date of Patent: August 17, 2010Assignee: Mitsubishi Electric CorporationInventors: Yasuhiko Kohno, Takashi Ohsawa
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Patent number: 7541858Abstract: An ignitor comprising a circuit with a millisecond order time constant and with a minimum circuit size and area, which is capable of self-shutdown without leading to erroneous ignition upon detection of an abnormality. An ignitor 1 capable of self-shutdown upon detection of an abnormality comprises an abnormality detection circuit 12 whose rise output is applied to the gate of a self-shutdown MOSFET 33 via an integration circuit 33 comprised of a diode 8 and a capacitor 9. The gate voltage of IGBT 5a, which is a main-current switching device, can be decremented.Type: GrantFiled: July 25, 2005Date of Patent: June 2, 2009Assignee: Renesas Technology Corp.Inventors: Seigou Yukutake, Mutsuhiro Mori, Yasuhiko Kohno
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Publication number: 20090108767Abstract: A DC/DC converter device according to the present invention includes a plurality of resonant DC/DC converters 3, connected in parallel, and a timing control circuit 5 driving the plurality of resonant DC/DC converters at substantially the same frequency with a phase shift.Type: ApplicationFiled: May 31, 2006Publication date: April 30, 2009Inventors: Yasuhiko Kohno, Takashi Ohsawa
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Publication number: 20060022609Abstract: An ignitor comprising a circuit with a millisecond order time constant and with a minimum circuit size and area, which is capable of self-shutdown without leading to erroneous ignition upon detection of an abnormality. An ignitor 1 capable of self-shutdown upon detection of an abnormality comprises an abnormality detection circuit 12 whose rise output is applied to the gate of a self-shutdown MOSFET 33 via an integration circuit 33 comprised of a diode 8 and a capacitor 9. The gate voltage of IGBT 5a, which is a main-current switching device, can be decremented.Type: ApplicationFiled: July 25, 2005Publication date: February 2, 2006Inventors: Seigou Yukutake, Mutsuhiro Mori, Yasuhiko Kohno
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Patent number: 6781568Abstract: A method for driving an LCD apparatus in which a predetermined image is displayed by applying a predetermined column signals on pixels for constituting selected rows of a plurality of the pixels arranged in rows and columns pattern includes steps of: dividing the pixels into a plurality of groups each composing of at least two pixels in a direction of the columns; and changing polarity of the column signals for each group.Type: GrantFiled: February 19, 2003Date of Patent: August 24, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masaru Nishimura, Yasuhiko Kohno
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Patent number: 6672295Abstract: A circuit for supplying an oscillation suppress current is provided between a collector terminal and gate electrode of a main IGBT. The current supply circuit comprises a resistor and a diode which are connected in series. A bypass MOSFET is connected between the series connection and the emitter terminal. No semiconductor element having different temperature characteristics is provided in the current supply circuit.Type: GrantFiled: February 11, 2003Date of Patent: January 6, 2004Assignee: Hitachi, Ltd.Inventors: Yasuhiko Kohno, Junpei Uruno, Mutsuhiro Mori
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Patent number: 6590559Abstract: Wiring between output terminals of a source driver IC (output terminals of a TCP for source driver IC) and picture elements is equalized when number of the picture elements is not an integer multiplied by number of outputs of the source driver IC in the liquid crystal display. By giving a start pulse for indicating a start timing of drive sections to a predetermined drive section at a timing different from an originally set start timing, a part of output terminals of the drive section is made unavailable.Type: GrantFiled: April 20, 1999Date of Patent: July 8, 2003Assignee: Kabushiki Kaisha Advanced DisplayInventors: Tsutomu Takabayashi, Masaru Nishimura, Yasuhiko Kohno, Hirofumi Shinohara
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Publication number: 20030122770Abstract: A method for driving an LCD apparatus in which a predetermined image is displayed by applying a predetermined column signals on pixels for constituting selected rows of a plurality of the pixels arranged in rows and columns pattern includes steps of: dividing the pixels into a plurality of groups each composing of at least two pixels in a direction of the columns; and changing polarity of the column signals for each group.Type: ApplicationFiled: February 19, 2003Publication date: July 3, 2003Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Masaru Nishimura, Yasuhiko Kohno
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Publication number: 20030116149Abstract: A circuit for supplying an oscillation suppress current is provided between a collector terminal and gate electrode of a main IGBT. The current supply circuit comprises a resistor and a diode which are connected in series. A bypass MOSFET is connected between the series connection and the emitter terminal. No semiconductor element having different temperature characteristics is provided in the current supply circuit.Type: ApplicationFiled: February 11, 2003Publication date: June 26, 2003Inventors: Yasuhiko Kohno, Junpei Uruno, Mutsuhiro Mori
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Patent number: 6583778Abstract: A method for driving an LCD apparatus in which a predetermined image is displayed by applying a predetermined column signals on pixels for constituting selected rows of a plurality of the pixels arranged in rows and columns pattern includes steps of: dividing the pixels into a plurality of groups each composing of at least two pixels in a direction of the columns; and changing polarity of the column signals for each group.Type: GrantFiled: June 5, 2001Date of Patent: June 24, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masaru Nishimura, Yasuhiko Kohno
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Patent number: 6539928Abstract: A circuit for supplying an oscillation suppress current is provided between a collector terminal and gate electrode of a main IGBT. The current supply circuit comprises a resistor and a diode which are connected in series. A bypass MOSFET is connected between the series connection and the emitter terminal. No semiconductor element having different temperature characteristics is provided in the current supply circuit.Type: GrantFiled: February 23, 2001Date of Patent: April 1, 2003Assignee: Hitachi, Ltd.Inventors: Yasuhiko Kohno, Junpei Uruno, Mutsuhiro Mori
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Patent number: 6448587Abstract: A circuit incorporated IGBT is provided with a semiconductor substrate having an IGBT area and a circuit area which are adjacent to each other. In a semiconductor layer of one conductivity type in which a circuit element is formed in the circuit area, there is provided another semiconductor layer of another conductivity type which adjoins the circuit element and has an impurity concentration higher than that of the semiconductor layer of the one conductivity type. An electrode contacts the other semiconductor layer and is connected to an electrode of the IGBT. Carriers are ejected from the other semiconductor layer to the electrode of the IGBT, thereby making it possible to prevent an erroneous operation of the circuit.Type: GrantFiled: November 7, 2001Date of Patent: September 10, 2002Assignee: Hitachi, Ltd.Inventors: Yasuhiko Kohno, Mutsuhiro Mori, Junpei Uruno
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Publication number: 20020067331Abstract: Wiring between output terminals of a source driver IC (output terminals of a TCP for source driver IC) and picture elements is equalized when number of the picture elements is not an integer multiplied by number of outputs of the source driver IC in the liquid crystal display. By giving a start pulse for indicating a start timing of drive sections to a predetermined drive section at a timing different from an originally set start timing, a part of output terminals of the drive section is made unavailable.Type: ApplicationFiled: April 20, 1999Publication date: June 6, 2002Inventors: TSUTOMU TAKABAYASHI, MASARU NISHIMURA, YASUHIKO KOHNO, HIROFUMI SHINOHARA
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Patent number: 6400350Abstract: A method is provided for driving an LCD apparatus in which a predetermined image is displayed by applying predetermined column signals to pixels constituting selected rows of an array of pixels arranged in columns and rows. The pixels are divided to form pluralities of groups that each have at least two pixels in either a column direction or a row direction. The column signals associated with each group are provided with a different polarity as to each adjacent group and a group characteristic is changed in different image frames.Type: GrantFiled: August 4, 1998Date of Patent: June 4, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masaru Nishimura, Yasuhiko Kohno
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Publication number: 20020040709Abstract: A circuit for supplying an oscillation suppress current is provided between a collector terminal and gate electrode of a main IGBT. The current supply circuit comprises a resistor and a diode which are connected in series. A bypass MOSFET is connected between the series connection and the emitter terminal. No semiconductor element having different temperature characteristics is provided in the current supply circuit.Type: ApplicationFiled: February 23, 2001Publication date: April 11, 2002Inventors: Yasuhiko Kohno, Junpei Uruno, Mutsuhiro Mori
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Patent number: 6366271Abstract: Method for driving LCD device comprises step of: applying one of upper image signal outputted from an upper liquid crystal drive circuit and lower image signal outputted from a lower liquid crystal drive circuit to a plurality of pixels of a selected line by scanning signal outputted from a scanning signal circuit out of the plurality of pixels disposed in matrix to display a predetermined image; wherein there exist in mixture a case where the polarities of the upper image signal and the lower image signal are inverted every one vertical period and a case where the same polarity is maintained. The driving circuit of LCD device of the present invention includes a vertical synchronization signal converting circuit so as to obtain upper image signal and lower image signal.Type: GrantFiled: August 4, 1998Date of Patent: April 2, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yasuhiko Kohno, Masaru Nishimura
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Publication number: 20020027253Abstract: A circuit incorporated IGBT is provided with a semiconductor substrate having an IGBT area and a circuit area which are adjacent to each other. In a semiconductor layer of one conductivity type in which a circuit element is formed in the circuit area, there is provided another semiconductor layer of another conductivity type which adjoins the circuit element and has an impurity concentration higher than that of the semiconductor layer of the one conductivity type. An electrode contacts the other semiconductor layer and is connected to an electrode of the IGBT. Carriers are ejected from the other semiconductor layer to the electrode of the IGBT, thereby making it possible to prevent an erroneous operation of the circuit.Type: ApplicationFiled: November 7, 2001Publication date: March 7, 2002Inventors: Yasuhiko Kohno, Mutsuhiro Mori, Junpei Uruno
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Patent number: 6180966Abstract: A trench gate type semiconductor device with a current sensing cell is composed so that the orientation of crystal face at side walls of trenches forming channels of trench gates in a main cell is equal or almost equal, or equivalent or almost equivalent to the orientation of crystal face at side walls of trenches forming channels of trench gates in a current sensing cell, which brings the same performance to the main and sense cells, whereby the high accuracy current sensing can be realized.Type: GrantFiled: March 25, 1998Date of Patent: January 30, 2001Assignee: Hitachi, Ltd.Inventors: Yasuhiko Kohno, Naoki Sakurai, Mutsuhiro Mori
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Patent number: 5719420Abstract: A semiconductor substrate is partitioned into a main IGBT region and a protection circuit region by a p-type well portion which is formed therebetween in contact with an emitter electrode and which acts as a cut-off region. Both a detection IGBT and protection circuit elements are formed within the protection circuit region. Since excessive carriers flowing from the main IGBT into the protection circuit region can efficiently be extracted through the p-type well portion, a highly reliable and high precision protection circuit built-in insulated gate semiconductor device is realized that can precisely detect any overcurrent, and operate without causing malfunction in the protection circuit and time delay.Type: GrantFiled: July 25, 1996Date of Patent: February 17, 1998Assignee: Hitachi, Ltd.Inventors: Yasuhiko Kohno, Yoshitaka Sugawara
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Patent number: 5563435Abstract: A semiconductor substrate is partitioned into a main IGBT region and a protection circuit region by a p-type well portion which is formed therebetween in contact with an emitter electrode and which acts as a cut-off region. Both a detection IGBT and protection circuit elements are formed within the protection circuit region. Since excessive carriers flowing from the main IGBT into the protection circuit region can efficiently be extracted through the p-type well portion, a highly reliable and high precision protection circuit built-in insulated gate semiconductor device is realized that can precisely detect any overcurrent, and operate without causing malfunction in the protection circuit and time delay.Type: GrantFiled: March 17, 1995Date of Patent: October 8, 1996Assignee: Hitachi, Ltd.Inventors: Yasuhiko Kohno, Yoshitaka Sugawara