Abstract: A crystal oscillation circuit using a crystal oscillator comprises an inverting amplifier, a buffer, and a voltage shift circuit. The voltage shift circuit operates in such a way that within prescribed limits by which the output of the inverting amplifier satisfies excitation conditions of the crystal oscillator and by which the oscillation output of the buffer satisfies input conditions of a following circuit, a supply voltage (Vdd) is reduced by a gate threshold voltage of an n-channel MOS transistor, and a ground potential (GND) is increased by a gate threshold voltage of a p-channel MOS transistor with respect to both the inverting amplifier and the buffer. Thus, it is possible to prevent the crystal oscillator from being damaged while suppressing the excitation level of the crystal oscillator even though the gain of the inverting amplifier is increased to be relatively high.

Abstract: A class D amplifier includes: an integrating circuit (1) which integrates an input signal; a flash A/D converter (2) which A/D converts an output signal of the integrating circuit; a waveform converting circuit (3) which produces a PWM signal based on an output of the flash A/D converter; a switching circuit which is includes a pair of MOS transistors (5, 6) connected between a first power source and a second power source, the junction point P of the pair of MOS transistors being connected to a loudspeaker (51); a driving circuit (4) which drives the pair of MOS transistors on the basis of the PWM signal; and a feedback resistor (RNF) which is connected between the junction point P and the input side of the integrating circuit, and negatively feeds back the output signal of the amplifier.

Abstract: A power-on/off reset circuit comprises a capacitor, a first transistor, a second transistor, a first current mirror circuit, a second current mirror circuit, and an inverter. In a power-on mode where the source voltage gradually increases in level, the capacitor is charged via the first transistor. The first current mirror circuit comprising a pair of transistors allows a current to flow therein in proportion to a potential of the capacitor. The second transistor converts the current to a voltage, which is input to the inverter to provide a first reset signal in the power-on mode. In a power-off mode where the source voltage gradually decreases in level, the second current mirror circuit comprising a pair of transistors temporarily increases the input voltage of the inverter to provide a second reset signal.

Abstract: A voltage-controlled oscillator is provided which has input and output characteristics that do not depend upon fluctuations or variations in the power supply voltage, operating temperature, and manufacturing process, and which provides a high oscillation frequency. A ring oscillator comprises a plurality of inverters that are connected in a ring-like arrangement. A voltage-current converter controls an amount of current flowing through each of the inverters of the ring oscillator according to a voltage of an input signal. The voltage-current converter comprises a first transistor (P101) that is connected to a power supply line and disposed such that current corresponding to the voltage of the input signal flows through the first transistor. Each of the inverters of the ring oscillator has a second transistor (P103) that is connected to the power supply line and forms a current mirror circuit with the first transistor.

Abstract: A constant current driving circuit capable of performing constant current driving of a load without being influenced by power supply variation, temperature variation and process variation, while reducing the output amplitude on the high level side. The circuit includes a high-level power supply terminal, a low-level power supply terminal, a reference current source circuit, and a switching drive stage.

Abstract: An output circuit for an integrated circuit device in which first and second power wirings are connected to a high-potential power terminal, third and fourth power wirings are connected to a low-potential power terminal, and a plurality of inverters are responsive, respectively, to a plurality of bit data signals, each being formed of P-channel and N-channel MOS transistors having drains thereof connected together, a junction of which forms an output terminal. First to fourth auxiliary transistors are provided for each of the inverters, which are connected, respectively, between the first power wiring and the source of the P-channel MOS transistor, between the second power wiring and the source of the P-channel MOS transistor, between the third power wiring and the source of the N-channel MOS transistor, and between the fourth power wiring and the source of the N-channel MOS transistor.

Abstract: A voltage dropping circuit is formed within an integrated circuit having at least one internal circuit, for dropping an external power supply voltage to generate a dropped voltage, and supplying the dropped voltage to the at least one internal circuit. A voltage divider divides the dropped voltage. A comparator compares the divided voltage with a reference voltage, and generates a control voltage according to a result of the comparison. A voltage generator generates the dropped voltage in response to the control voltage. A setting block sets a ratio of the divided voltage to the dropped voltage.