Patents by Inventor Yasuhiro Matsunaga

Yasuhiro Matsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8307636
    Abstract: To suppress clogging of an injection nozzle that supplies fuel to an exhaust passage of an engine, a controller executes intermittent addition of fuel from the injection nozzle. In executing the intermittent addition, the controller calculates a particulate discharge amount within the exhaust passage based on the engine operation state, and multiplies the exhaust gas temperature by the intake air rate to calculate the exhaust energy. Then, based on the particulate discharge amount and the exhaust energy, the controller calculates the amount of fuel to be added.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: November 13, 2012
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Yasuhiro Matsunaga
  • Publication number: 20100229534
    Abstract: To suppress clogging of an injection nozzle that supplies fuel to an exhaust passage of an engine, a controller executes intermittent addition of fuel from the injection nozzle. In executing the intermittent addition, the controller calculates a particulate discharge amount within the exhaust passage based on the engine operation state, and multiplies the exhaust gas temperature by the intake air rate to calculate the exhaust energy. Then, based on the particulate discharge amount and the exhaust energy, the controller calculates the amount of fuel to be added.
    Type: Application
    Filed: October 20, 2008
    Publication date: September 16, 2010
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Yasuhiro Matsunaga
  • Patent number: 7621661
    Abstract: An interior illumination lamp 1 includes a housing 13 for mounting in an opening 12 formed in an interior member 11 of a vehicle, upstanding members 14 extending from a reverse surface 13a of the housing 13, bending members 15 connected to distal ends of the upstanding members 14, and a plurality of pairs of prevention portions 17 disposed adjacent the upstanding members 14. The prevention portions 17 lock the bending member 15 such that the interior member 11 is locked therebetween. Angle maintaining means 18 prevent the bending members from being bent too far so that the interior member is not compressed too much.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: November 24, 2009
    Assignee: Yazaki Corporation
    Inventors: Toshiaki Okabe, Kenji Oishi, Yasuhiro Matsunaga
  • Patent number: 7093148
    Abstract: A microcontroller includes a clock circuit with a register storing clock frequency information corresponding to a low speed or normal mode respectively operated by a low frequency or normal clock, which outputs a first signal according to a value set in the register when the low speed mode is designated during operation in the normal mode, a DRAM holding data, in the low speed mode, by operation in a self-refresh mode, and outputting a confirmation signal indicating switching to that mode, a DRAM circuit switching the DRAM to that mode based on the first signal, a ROM operated in the low speed mode, a remap circuit controlling an address circuit based on the confirmation signal, and outputting a second signal for switching a program execution address from the DRAM to an address of the ROM to control an address space in which a program is executed, the address circuit switching the address space based on the second signal.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: August 15, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasuhiro Matsunaga
  • Publication number: 20050265036
    Abstract: An interior illumination lamp 1 includes a housing 13 for mounting in an opening 12 formed in an interior member 11 of a vehicle, upstanding members 14 formed in an upstanding manner on a reverse surface 13a of the housing 13, bending members 15 which are connected respectively to distal ends of the upstanding members 14, and can be bent to be disposed generally parallel to the reverses surface 13a of the housing 13, and a plurality of pairs of prevention portions 17 which are provided on the reverse surface 13a of the housing 13, and are disposed adjacent respectively to the upstanding members 14. Each pair of prevention portions 17 prevent the corresponding bending member 15 from being restored from a bent condition to an upstanding condition when engagement portions 16, formed on the bending member 15, slide respectively past the prevention portions 17.
    Type: Application
    Filed: May 25, 2005
    Publication date: December 1, 2005
    Inventors: Toshiaki Okabe, Kenji Oishi, Yasuhiro Matsunaga
  • Patent number: 6777070
    Abstract: An anti-reflection material and a polarization film which exhibit superior anti-reflection properties by preventing external light such as sunlight, fluorescent light, etc., from being reflected on a display, which yield a clear image without sparkling and reduces image contrast, and which exhibit superior wear resistance, chemical resistance, and contamination resistance, as well as exhibit optical stability. A hard coat layer is provided on one surface or two surfaces of a transparent substrate directly or via another layer, and an anti-reflection film having a lower refraction index than the hard coat layer is further provide on the hard coat layer.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: August 17, 2004
    Assignee: Tomoegawa Paper Co., Ltd.
    Inventors: Chikara Murata, Kazuya Ohishi, Yasuhiro Matsunaga, Tomohisa Yamamoto
  • Publication number: 20040044916
    Abstract: A microcontroller comprises a clock control circuit provided with a clock mode designation register for storing clock frequency information corresponding to an extremely low speed mode for an operation by a clock of an extremely low frequency, or a normal operation mode for operation by a clock of a normal frequency, which outputs a first control signal in accordance with a value set in the clock mode designation register when the extremely low speed mode is designated during an operation on the normal operation mode, a DRAM for holding, on the extremely low speed mode, data by being operated on a self-refresh mode, and outputting a confirmation signal indicating transfer to the self-refresh mode, a DRAM control circuit for transferring the DRAM to the self-refresh mode based on the first control signal, a ROM operated on the extremely low speed mode, a remap control circuit for controlling an address changing circuit based on the confirmation signal outputted form the DRAM, and outputting a second control si
    Type: Application
    Filed: February 20, 2003
    Publication date: March 4, 2004
    Inventor: Yasuhiro Matsunaga
  • Publication number: 20020159315
    Abstract: A semiconductor memory including a memory cell unit, the memory cell unit comprising: a plurality of memory cells in which each conductance between current terminals changes according to held data, each having a plurality of current terminals connected in series between a first terminal and a second terminal, and each capable of electrically rewriting the data; a first select switching element electrically connecting said first terminal to a data transfer line; and a MISFET serving as a second select switching element connecting said second terminal to a reference potential line, wherein said semiconductor memory has a data read mode for forcing the first and second select switching elements of said memory cell unit into conduction, applying a read voltage for forcing a path between the current terminals Into conduction or cut-off according to the data of a selected memory cell, to a control electrode of the selected memory cell, applying a pass voltage for forcing a path between the current terminals into co
    Type: Application
    Filed: March 29, 2002
    Publication date: October 31, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mitsuhiro Noguchi, Akira Goda, Yasuhiro Matsunaga
  • Patent number: 6261665
    Abstract: The present invention provides an anti-reflection material and a polarizing film which can exhibit excellent anti-reflection properties and can obtain a visible image without glittering and without reducing an image contrast while exhibiting an excellent wear resistance and chemical resistance, as well as, exhibiting an excellent stain resistance. A surface-roughened layer (12) is provided on one surface or double surfaces of a transparent substrate (11) directly or via another layer, and the surface-roughened layer (12) comprises an ultraviolet-curing resin comprising at least an epoxy compound and a photo-cationic polymerization initiator.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: July 17, 2001
    Assignee: Tomoegawa Paper Co., Ltd.
    Inventors: Chikara Murata, Kazuya Ohishi, Yasuhiro Matsunaga, Kazuhiro Yamasaki, Yukinori Sakumoto
  • Patent number: 6074741
    Abstract: The invention provides an antiglare material which exhibits excellent antiglare property by preventing shining of external light in a display and is suitable for display of vivid and high-definition images free of any glare, and a polarizing film using the same. The antiglare material includes a transparent substrate provided with a roughened surface layer on one or both sides thereof. The roughened surface layer is formed from an ultraviolet curing resin containing at least an epoxy compound and a photo-cationic polymerization initiator, and beads of a crosslinked acrylic resin.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: June 13, 2000
    Assignee: Tomoegawa Paper Co., Ltd.
    Inventors: Chikara Murata, Kazuya Ohishi, Yasuhiro Matsunaga, Kazuhiro Yamasaki, Yukinori Sakumoto