Patents by Inventor Yasuhiro Sugiyama
Yasuhiro Sugiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11984387Abstract: A first chip includes a first surface, a second surface, a first semiconductor layer including a nitride semiconductor layer, a first electrode pad located at the first surface, a second electrode pad located at the first surface, a first gate pad located at the first surface, and a third electrode pad located at the first surface. A second chip is located on the first surface of the first chip. The second chip includes a third surface facing the first surface of the first chip, a fourth surface, a second semiconductor layer including a channel of a second conductivity type, a fourth electrode pad located at the fourth surface, a fifth electrode pad located at the third surface and bonded to the second electrode pad of the first chip, and a second gate pad located at the third surface and bonded to the third electrode pad of the first chip.Type: GrantFiled: March 3, 2022Date of Patent: May 14, 2024Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Toru Sugiyama, Akira Yoshioka, Yasuhiro Isobe
-
Patent number: 11948864Abstract: A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.Type: GrantFiled: September 2, 2021Date of Patent: April 2, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Toru Sugiyama, Hitoshi Kobayashi
-
Publication number: 20240105826Abstract: A semiconductor device of an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first electrode film provided on the first insulating film, a second electrode film provided on the first electrode film, and a first field plate electrode provided on the second electrode film. A lower end of the first field plate electrode is located on a second surface of the first electrode film, the second surface being in contact with the second electrode film, rather than a first surface of the first electrode film, the first surface being in contact with the first insulating film.Type: ApplicationFiled: March 1, 2023Publication date: March 28, 2024Inventors: Hitoshi KOBAYASHI, Masaaki ONOMURA, Toru SUGIYAMA, Akira YOSHIOKA, Hung HUNG, Hideki SEKIGUCHI, Tetsuya OHNO, Yasuhiro ISOBE
-
Publication number: 20240105563Abstract: A semiconductor device includes a nitride semiconductor element, a first diode, and a second diode; the nitride semiconductor element includes a conductive mounting bed, a semiconductor substrate formed on the mounting bed, a first nitride semiconductor layer, a second nitride semiconductor layer, a first major electrode, a second major electrode, a first gate electrode, and a second gate electrode; the first diode includes a first anode electrode electrically connected to the mounting bed, and a first cathode electrode electrically connected to the first major electrode; and the second diode includes a second anode electrode electrically connected to the mounting bed, and a second cathode electrode electrically connected to the second major electrode.Type: ApplicationFiled: March 9, 2023Publication date: March 28, 2024Inventors: Toru SUGIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Hideki SEKIGUCHI, Tetsuya OHNO, Masaaki ONOMURA
-
Publication number: 20240097671Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.Type: ApplicationFiled: February 10, 2023Publication date: March 21, 2024Inventors: Toru SUGIYAMA, Noriaki YOSHIKAWA, Yasuhiko KURIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Tetsuya OHNO, Hideki SEKIGUCHI, Masaaki ONOMURA
-
Publication number: 20240088280Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor layer having a heterojunction, a second semiconductor layer on the first semiconductor layer and having another heterojunction, a drain electrode on the second semiconductor layer, a source electrode provided on the first semiconductor layer, a gate electrode provided on the first semiconductor layer between the drain electrode and the source electrode, and a first insulating film between the gate electrode and the drain electrode covering the first semiconductor layer and the second semiconductor layer. The second semiconductor layer being separated from the gate electrode by a portion of the insulating film. A distance from the second semiconductor layer to the gate electrode is shorter than a distance from the drain electrode to the gate electrode.Type: ApplicationFiled: February 28, 2023Publication date: March 14, 2024Inventors: Hung HUNG, Yasuhiro ISOBE, Akira YOSHIOKA, Toru SUGIYAMA, Hitoshi KOBAYASHI
-
Patent number: 7441333Abstract: An assembly device of a support mat for a ceramic catalyst carrier includes: a push-in device provided in a vertically movable tool base and capable of pushing a ceramic catalyst carrier together with a support mat into a recession of a shaping die; a first and a second pressing unit pressing both end portions of the support mat from side faces so as to curve the both end portions of the support mat along an arc-shaped upper surface of the ceramic catalyst carrier; first pressing pieces and a second pressing piece provided in tip portions of the first and second pressing units; and a push-up unit provided on a bottom of the recession and capable of pushing up the ceramic catalyst carrier together with the support mat.Type: GrantFiled: December 23, 2004Date of Patent: October 28, 2008Assignee: Calsonic Kansei CorporationInventor: Yasuhiro Sugiyama
-
Patent number: 7320176Abstract: An assembly device includes: a push-in unit provided in a vertically movable tool base to push a ceramic catalyst carrier together with a support mat into a recession of a shaping die; a first and second pressing units for pressing both end portions of the mat from side faces to curve them along an arc-shaped upper surface of the carrier; pressure rollers provided at the both pressing units to press the both end portions toward the carrier; a tape presser in the push-in unit for pressing an adhesive tape to an upper surfaces of engagement portions of the depression and projection in a gap formed between the both rollers and operating with the push-in unit in pushing the carrier and mat into the recession of the shaping die; and a push-up unit provided on a bottom of the recession to push up the carrier and mat.Type: GrantFiled: January 3, 2005Date of Patent: January 22, 2008Assignee: Calsonic Kansei CorporationInventors: Yasuhiro Sugiyama, Isao Kato
-
Publication number: 20070180695Abstract: A ceramic catalyst carrier 6 with a non-expandable mat 7 being assembled on an outer periphery thereof is, after the entire outer peripheral surface of the non-expandable mat 7 is evenly pressed in a radial direction and an contour thereof is press formed to be close to an inner diameter of an outer housing cylinder 8 constituting a part of an exhaust passage, press-fitted into the outer housing cylinder 8 by a press-fitting unit 3.Type: ApplicationFiled: June 30, 2005Publication date: August 9, 2007Applicant: Calsonic Kansei CorporationInventor: Yasuhiro Sugiyama
-
Publication number: 20050147708Abstract: An assembly device includes: a push-in unit provided in a vertically movable tool base to push a ceramic catalyst carrier together with a support mat into a recession of a shaping die; a first and second pressing units for pressing both end portions of the mat from side faces to curve them along an arc-shaped upper surface of the carrier; pressure rollers provided at the both pressing units to press the both end portions toward the carrier; a tape presser in the push-in unit for pressing an adhesive tape to an upper surfaces of engagement portions of the depression and projection in a gap formed between the both rollers and operating with the push-in unit in pushing the carrier and mat into the recession of the shaping die; and a push-up unit provided on a bottom of the recession to push up the carrier and mat.Type: ApplicationFiled: January 3, 2005Publication date: July 7, 2005Inventors: Yasuhiro Sugiyama, Isao Kato
-
Publication number: 20050142044Abstract: An assembly device of a support mat for a ceramic catalyst carrier includes: a push-in device provided in a vertically movable tool base and capable of pushing a ceramic catalyst carrier together with a support mat into a recession of a shaping die; a first and a second pressing unit pressing both end portions of the support mat from side faces so as to curve the both end portions of the support mat along an arc-shaped upper surface of the ceramic catalyst carrier; first pressing pieces and a second pressing piece provided in tip portions of the first and second pressing units; and a push-up unit provided on a bottom of the recession and capable of pushing up the ceramic catalyst carrier together with the support mat.Type: ApplicationFiled: December 23, 2004Publication date: June 30, 2005Inventor: Yasuhiro Sugiyama