Abstract: A method of manufacturing a semiconductor integrated circuit device having on the same substrate both a high breakdown voltage MISFET and a low breakdown voltage MISFET is provided. An element isolation trench is formed in advance so that the width thereof is larger than the sum of the thickness of a polycrystalline silicon film serving as a gate electrode of a low breakdown voltage, the thickness of a gate insulating film and an alignment allowance in processing of a gate electrode in a direction orthogonal to the extending direction of the gate electrode and is larger than the thickness of the polycrystalline silicon film in a planar region not overlapping the gate electrode. It is possible to decrease the number of manufacturing steps for the semiconductor integrated circuit device.

Abstract: The performance of an amplifying system is improved by achieving adequate matching. The amplifying system for amplifying signals includes distributing means 1 that distribute a signal, a carrier amplifier 2 that amplifies the distributed first signal in Class AB, a peak amplifier 4 that amplifies the distributed second signal in Class B or Class C, a first transmission line having a given electric length and being connected to an output of the carrier amplifier, a second transmission line having a given electric length and being connected to an output of the peak amplifier, and a combining end 18 for combining an output of the first transmission line and an output of the second transmission line.

Abstract: A semiconductor device includes a gate electrode formed through an insulating film in a groove having a first side surface adjacent to a source region and a base region, and a second conductive type first impurity region formed adjacent to a second side surface of the groove between the groove and a lead-out portion of a drain region existing below the base region so as to extend downward beyond a lower end of the groove.

Abstract: A semiconductor device includes a trench formed in a surface of a semiconductor substrate. A conductor is embedded in the trench. A conductive layer is arranged adjacent to the trench on the surface of the semiconductor substrate. Semiconductor elements, which include sources provided by one of the conductor and the conductive layer and drains provided by the other one of the conductor and the conductive layer, are formed in a semiconductor element formation region. A planar wiring layer is embedded in the semiconductor substrate under the entire semiconductor element formation region and connected to the conductor.

Abstract: A first control unit controls a bias applied to the peak amplifier to (a) make a peak amplifier operate as class C when the level of the input signal is lower than a first threshold value, to (b) make the peak amplifier operate as class AB with a second conduction angle substantially equal to a first conduction angle, when the level of the input signal is higher than a second threshold value higher than the first threshold value, and to (c) make the peak amplifier operate as class AB with a third conduction angle smaller than the first conduction angle, when the level of the input signal is not less than the first threshold value and not more than the second threshold value.

Abstract: A method of manufacturing a semiconductor integrated circuit device having on the same substrate both a high breakdown voltage MISFET and a low breakdown voltage MISFET is provided. An element isolation trench is formed in advance so that the width thereof is larger than the sum of the thickness of a polycrystalline silicon film serving as a gate electrode of a low breakdown voltage, the thickness of a gate insulating film and an alignment allowance in processing of a gate electrode in a direction orthogonal to the extending direction of the gate electrode and is larger than the thickness of the polycrystalline silicon film in a planar region not overlapping the gate electrode. It is possible to decrease the number of manufacturing steps for the semiconductor integrated circuit device.

Abstract: A semiconductor device includes a gate electrode formed through a gate insulating film provided on a first impurity region and a drift layer, and this gate electrode consists of two regions including a first conductivity type second impurity region opposed to the first impurity region and a third impurity region capable of forming a depletion layer.

Abstract: A conventional power amplifying device has a problem that when a signal band is widened, sampling frequency for distortion detection is increased and an FFT calculation amount of a distortion compensation unit is increased, which increase a circuit size and power consumption. The present invention provides a non-linear distortion detection method and a distortion compensation amplifying device capable of suppressing increase of the circuit size and the power consumption even if the signal band is widened. A signal obtained by feeding back an output of a power amplifier is sampled by an A/D converter. An equalizer of a distortion detection unit uses an input signal d(n) of a predistorter as a reference symbol to detect an equalization error e(n) of the orthogonal demodulation signal u(n). An absolute value averaging unit outputs an absolute value of the equalization error e(n) which has been temporally averaged to E(n) as a distortion value to a control unit.

Abstract: A method of manufacturing a semiconductor integrated circuit device having on the same substrate both a high breakdown voltage MISFET and a low breakdown voltage MISFET is provided. An element isolation trench is formed in advance so that the width thereof is larger than the sum of the thickness of a polycrystalline silicon film serving as a gate electrode of a low breakdown voltage, the thickness of a gate insulating film and an alignment allowance in processing of a gate electrode in a direction orthogonal to the extending direction of the gate electrode and is larger than the thickness of the polycrystalline silicon film in a planar region not overlapping the gate electrode. It is possible to decrease the number of manufacturing steps for the semiconductor integrated circuit device.

Abstract: A semiconductor device capable of improving the operating speed and inhibiting the threshold voltage from fluctuation is obtained. In this semiconductor device, fluorine is introduced into at least any of regions extending over the junction interfaces between a first conductivity type semiconductor region and second conductivity type source/drain regions, at least the interface between the gate insulator film and the central region of a channel region as well as a gate insulator film, and side wall insulator films.

Abstract: A semiconductor device for improving performance of a p-channel transistor and an n-channel transistor having multi-finger structures. Gates of the n-channel transistor are arranged so that their gate width direction is parallel to one side of a first region. Gates of the p-channel transistor are arranged so that their gate width direction extends at an angle of 45 degrees with respect to one side of a second region. The ratio of a maximum gate width of the p-channel transistor arranged in the second region to the pitch between the gates of the p-channel transistor is set in accordance with the ratio of the area of an ineffective region to the area of the second region.

Abstract: A semiconductor device includes a trench formed in a surface of a semiconductor substrate. A conductor is embedded in the trench. A conductive layer is arranged adjacent to the trench on the surface of the semiconductor substrate. Semiconductor elements, which include sources provided by one of the conductor and the conductive layer and drains provided by the other one of the conductor and the conductive layer, are formed in a semiconductor element formation region. A planar wiring layer is embedded in the semiconductor substrate under the entire semiconductor element formation region and connected to the conductor.

Abstract: A semiconductor device for preventing a parasitic bipolar transistor from operating while reducing the ON resistance of a double-diffused MOS transistor. Boron having a relatively high solid solubility limit in silicon and indium having a relatively low solid solubility limit in silicon are diffused as p-type impurities into a body region. The concentration ratio of indium with respect to boron is higher in the vicinity of a source diffusion layer in the body region than in other portions. Thus, indium that does not solidify remains in the lattice of silicon. This reduces the lifetime of carriers in the body region and prevents the parasitic bipolar transistor from operating. The lateral junction abruptness at a pn junction between the body region and the source diffusion layer is improved, and the ON resistance of the DMOS transistor is reduced.

Abstract: A method of manufacturing a semiconductor integrated circuit device having on the same substrate both a high breakdown voltage MISFET and a low breakdown voltage MISFET is provided. An element isolation trench is formed in advance so that the width thereof is larger than the sum of the thickness of a polycrystalline silicon film serving as a gate electrode of a low breakdown voltage, the thickness of a gate insulating film and an alignment allowance in processing of a gate electrode in a direction orthogonal to the extending direction of the gate electrode and is larger than the thickness of the polycrystalline silicon film in a planar region not overlapping the gate electrode. It is possible to decrease the number of manufacturing steps for the semiconductor integrated circuit device.

Abstract: A semiconductor device for effectively suppressing noise propagation between circuits. The semiconductor device includes a semiconductor substrate having a main surface. Two circuit regions are defined in the semiconductor substrate. A circuit isolation region is located between the two circuit regions. A dummy diffusion layer is formed in the circuit isolation region. The dummy diffusion layer has an upper surface that is lower than the main surface of the semiconductor substrate.

Abstract: The leather-like sheet substrate of the invention comprises a nonwoven fabric of three-dimensionally entangled superfine fibers (A) of at most 0.5 dtex in fineness and a polymer elastomer (B) filled in the entangled interspaces of the nonwoven fabric, in which the superfine fibers (A) comprise an organophosphorus component-copolymerized polyester and the polymer elastomer (B) contains a metal hydroxide or is copolymerized with an organophosphorus component. The leather-like sheet substrate of the invention and artificial leather obtained from it contain no halogen and are resistant to flames. These have a soft feel and are suitable to applications in the interior field that requires flame retardancy, especially to seats for vehicles, etc.

Abstract: A semiconductor device includes a glass substrate, a heat sink formed on the glass substrate and a transistor formed on the heat sink. The transistor includes an active layer formed on the heat sink and having a source region, a channel region and a drain region. A gate electrode is placed on the channel region. In addition, the heat sink may operate as additional gate electrode.

Abstract: There is provided an amplifier for combining outputs of a plurality of amplifying circuits to generate an amplifier output. The amplifier includes a first amplifying circuit for operating a first amplifying device in class-AB, wherein the first amplifying circuit is one among the plurality of the amplifying circuits; a second amplifying circuit for operating a second amplifying device in class-B or class-C, wherein the second amplifying circuit is one among the plurality of the amplifying circuits; and a summing node at which an output of the first amplifying circuit is combined with an output of the second amplifying circuit via a first impedance transformer containing a transmission line of an electrical length other than ?/4. The second amplifying device is connected to the summing node via an output matching circuit and a second impedance transformer containing a transmission line.

Abstract: A radio transmitter includes a CPU, functioning to allow the radio signal to be transmitted in event of a decision result that the radio signal transmission should be permitted but, in event of a decision result that the radio signal transmission should not be permitted, functions to allow the radio signal to be stopped and to instruct the alarm output section to output an abnormal alarm; a distributor, functioning to distribute a radio signal outputted from the radio transmitter to the outside; a transmitter; a spectral analysis, functioning to perform a frequency analysis of the radio signal according to the standard information; a power comparator section, to decide whether or not a transmission of the radio signal should be permitted by comparing the result of the frequency analysis with the standard information; and an alarm output section.

Abstract: A semiconductor device includes a glass substrate, a heat sink formed on the glass substrate and a transistor formed on the heat sink. The transistor includes an active layer formed on the heat sink and having a source region, a channel region and a drain region. A gate electrode is placed on the channel region. In addition, the heat sink may operate as additional gate electrode.