Patents by Inventor Yasuhisa Ishikawa

Yasuhisa Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240165035
    Abstract: Provided is a coated solid pharmaceutical preparation which not only makes it difficult to perceive the unpleasant taste and/or unpleasant odor of pharmacologically active substances when taken but also does not easily discolor over time. In the coated solid pharmaceutical preparation, a solid pharmaceutical preparation containing a pharmacologically active substance is coated with a film containing a film-forming polymer and a flaky substance.
    Type: Application
    Filed: March 18, 2022
    Publication date: May 23, 2024
    Inventors: Yasuhisa ISHIKAWA, Gento KODAKA, Makoto UMINO, Yoichi ONUKI, Minoru OKADA
  • Publication number: 20240134220
    Abstract: An optical scan device includes an optical waveguide array, including a plurality of optical waveguides each of which propagates light along a first direction, that emits a light beam, the plurality of optical waveguides being arranged in a second direction that intersects the first direction, a phase shifter array including a plurality of phase shifters connected separately to each of the plurality of optical waveguides, a control circuit that controls a phase shift amount of each of the plurality of phase shifters and/or inputting of light to each of the plurality of phase shifters and thereby controls a direction and shape of the light beam that is emitted from the optical waveguide array, a photodetector that detects the light beam reflected by a physical object, and a signal processing circuit that generates distance distribution data on the basis of output from the photodetector.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 25, 2024
    Inventors: Yasuhisa INADA, Atsushi Ishikawa, Yumiko Kato
  • Patent number: 11961059
    Abstract: The present disclosure promotes distribution of sensor data among a plurality of business operators. A controller that an information processing system according to the present disclosure includes collects first data including a plurality of items and personal information from mobile bodies belonging to a first business operator. The controller converts the first data to second data not being usable to identify individuals. The controller provides data in a range decided based on content of a predetermined data use contract, among the second data, to a second business operator. The controller calculates a consideration for the data that is to be paid by the second business operator, based on a data use record of the second business operator.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 16, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Nobuaki Matsueda, Takashi Sueki, Jun Okamoto, Takumi Wada, Ryo Midorikawa, Junichi Nonaka, Wataru Shiraishi, Yasuhisa Fujiwara, Hiroshi Ishikawa, Shigeru Ichikawa, Hidetaka Eguchi, Masayo Nagai, Mika Inaba
  • Publication number: 20240089344
    Abstract: A transmitting terminal can transmit a content held by itself to a specific receiving terminal having no email software as if using a mailer. The transmitting terminal (10) and the receiving terminal (20) are connected to a delivery server (30) via a network (4). The delivery server (30) comprises: a database (36) for registering the device ID that specifies the receiving terminal (20); a content storage (39) for temporarily storing a content transmitted from the transmitting terminal (10); and table (33, 37) for managing contents separately on a per device ID basis of the receiving terminal. The delivery server (30), when receiving a request from the receiving terminal (20), refers to the tables (33, 27) and transmits to the receiving terminal (20) a content, the transmission destination of which corresponds to the device ID of the receiving terminal (20).
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Hiroki Mizosoe, Junji Shiokawa, Kazuto Yoneyama, Kunihiro Nomura, Masaaki Hiramatsu, Yasuhisa Mori, Takashi Yoshimaru, Kazuaki Aoyama, Tomomu Ishikawa, Yo Miyamoto
  • Publication number: 20240077359
    Abstract: An optical filter includes a filter array including filters two-dimensionally arrayed and a band-pass filter. The filters includes first and second filters. A transmission spectrum of each of the first and second filters has local maximum values of transmittance at three or more wavelengths included in a first wavelength region. The band-pass filter passes light in a second wavelength region including two or more wavelengths of the three or more wavelengths and not including one or more wavelengths of the three or more wavelengths. The filter array and the band-pass filter are disposed so that (a) the band-pass filter is located on an optical path of light that passes through the first and second filters or (b) the first and second filters are located on an optical path of light that passes through the band-pass filter.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Inventors: YASUHISA INADA, ATSUSHI ISHIKAWA
  • Patent number: 7800180
    Abstract: A semiconductor device is disclosed. The semiconductor device includes an internal circuit having a high breakdown voltage transistor, and a first electrostatic protection circuit in which electrostatic protection elements are connected in series. The sum of the breakdown voltage values of the electrostatic protection elements in the first electrostatic protection circuit is almost equal to the breakdown voltage value of the high breakdown voltage transistor. The first electrostatic protection circuit is connected between an input/output terminal and a ground terminal of the semiconductor device to which terminals the internal circuit is connected.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: September 21, 2010
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Atsushi Watanabe, Yasuhisa Ishikawa
  • Publication number: 20080001229
    Abstract: A semiconductor device is disclosed. The semiconductor device includes an internal circuit having a high breakdown voltage transistor, and a first electrostatic protection circuit in which electrostatic protection elements are connected in series. The sum of the breakdown voltage values of the electrostatic protection elements in the first electrostatic protection circuit is almost equal to the breakdown voltage value of the high breakdown voltage transistor. The first electrostatic protection circuit is connected between an input/output terminal and a ground terminal of the semiconductor device to which terminals the internal circuit is connected.
    Type: Application
    Filed: June 4, 2007
    Publication date: January 3, 2008
    Inventors: Atsushi WATANABE, Yasuhisa ISHIKAWA
  • Patent number: 6952037
    Abstract: A semiconductor device includes a substrate, a well region formed in the substrate, a field effect transistor formed in the well region, and a diffused region, formed across the well region and the substrate for applying back gate potential to the well region, and forming a PN junction together with its periphery. The field effect transistor and the PN junction are connected between terminals for absorbing excess current so that an internal circuit connected to the terminals is protected.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: October 4, 2005
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Yasuhisa Ishikawa, Atsushi Watanabe, Yukihiro Terada, Akira Ikeuchi, Hiroshi Oya
  • Publication number: 20040124471
    Abstract: A semiconductor device includes a substrate, a well region formed in the substrate, a field effect transistor formed in the well region, and a diffused region, formed across the well region and the substrate for applying back gate potential to the well region, and forming a PN junction together with its periphery. The field effect transistor and the PN junction are connected between terminals for absorbing excess current so that an internal circuit connected to the terminals is protected.
    Type: Application
    Filed: September 10, 2003
    Publication date: July 1, 2004
    Inventors: Yasuhisa Ishikawa, Atsushi Watanabe, Yukihiro Terada, Akira Ikeuchi, Hiroshi Oya
  • Patent number: 6538290
    Abstract: A static protection device protects an internal circuit of a semiconductor device from surge voltages. An emitter terminal of the PNP transistor is connected to the input/output terminal, a collector terminal of the PNP transistor is connected to the ground terminal, and the base terminal is left open, to realize the static protection device. In this manner the reverse-biased protection can be maintained with respect to the internal circuit.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: March 25, 2003
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Yasuhisa Ishikawa, Yukihiro Terada
  • Patent number: D454094
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: March 5, 2002
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Koji Miwa, Asao Itaya, Yasuhisa Ishikawa
  • Patent number: D456748
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: May 7, 2002
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Michael Keating, Yasuhisa Ishikawa