Patents by Inventor Yasuhisa SHIGENAGA

Yasuhisa SHIGENAGA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190206628
    Abstract: A laminated electronic component includes a rectangular parallelepiped shaped stacked body including dielectric layers and internal electrode layers which are alternately laminated and a pair of first conductors and a pair of second conductors which are disposed on an outer surface of the stacked body. The first conductors are disposed in portions which include centers of long sides of a first principal surface which is positioned in a direction of lamination of the dielectric layers and the internal electrode layers of the stacked body, and do not include a vertex of the stacked body so as to extend from first side surfaces to the first principal surface. The second conductors are disposed on second side surfaces, and the first conductors and the second conductors are spaced apart from each other on an outer surface and electrically connected to each other via the internal electrode layers.
    Type: Application
    Filed: October 30, 2018
    Publication date: July 4, 2019
    Applicant: KYOCERA Corporation
    Inventors: Michiaki NISHIMURA, Yasuhisa SHIGENAGA
  • Patent number: 10283271
    Abstract: A laminated electronic component includes a main body including an effective layer in which dielectric layers and internal electrode layers are alternately laminated, and a pair of a first cover layer and a second cover layer which are disposed on opposite sides, respectively, in a stacking direction of the effective layer; and a plurality of external electrodes disposed on an outer surface of the main body. The internal electrode layers are alternately connected to the different external electrodes, and the first cover layer has a high-Young's modulus layer which is higher in Young's modulus than the dielectric layers. By mounting such a laminated electronic component to a substrate so that the first cover layer and a mounting face of the substrate are opposed to each other, it is possible to suppress acoustic noise.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: May 7, 2019
    Assignee: KYOCERA CORPORATION
    Inventors: Michiaki Nishimura, Yasuhisa Shigenaga
  • Patent number: 10141112
    Abstract: A laminated electronic component includes: a rectangular parallelepiped-shaped stacked body including dielectric layers and internal electrode layers which are alternately laminated; and a pair of first conductors and a pair of second conductors which are disposed on an outer surface of the stacked body. The first conductors are disposed in portions which include centers of long sides of a first principal surface which is positioned in a direction of lamination of the dielectric layers and the internal electrode layers of the stacked body, and do not include a vertex of the stacked body so as to extend from first side surfaces to the first principal surface. The second conductors are disposed on second side surfaces, and the first conductors and the second conductors are spaced apart from each other on an outer surface and electrically connected to each other via the internal electrode layers.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: November 27, 2018
    Assignee: KYOCERA CORPORATION
    Inventors: Michiaki Nishimura, Yasuhisa Shigenaga
  • Publication number: 20170186545
    Abstract: A laminated electronic component includes: a rectangular parallelepiped-shaped stacked body including dielectric layers and internal electrode layers which are alternately laminated; and a pair of first conductors and a pair of second conductors which are disposed on an outer surface of the stacked body. The first conductors are disposed in portions which include centers of long sides of a first principal surface which is positioned in a direction of lamination of the dielectric layers and the internal electrode layers of the stacked body, and do not include a vertex of the stacked body so as to extend from first side surfaces to the first principal surface. The second conductors are disposed on second side surfaces, and the first conductors and the second conductors are spaced apart from each other on an outer surface and electrically connected to each other via the internal electrode layers.
    Type: Application
    Filed: July 28, 2015
    Publication date: June 29, 2017
    Applicant: KYOCERA Corporation
    Inventors: Michiaki NISHIMURA, Yasuhisa SHIGENAGA
  • Publication number: 20170042029
    Abstract: A laminated electronic component includes a main body composed of a stacked body in which dielectric layers and internal electrode layers are alternately laminated, and an external electrode disposed on an outer surface of the stacked body so as to make electrical connection with the internal electrode layers; and a first joining member and a second joining member which are provided on a first face side located in a stacking direction of the dielectric layers and the inner electrode layers. The first joining member and the second joining member are provided on a first side and second side which constitute the first face, respectively, and located in a region which includes midpoints thereof but does not include a vertex of the main body. By mounting such a laminated electronic component to a substrate via the joining members, acoustic noise can be suppressed.
    Type: Application
    Filed: December 24, 2014
    Publication date: February 9, 2017
    Applicant: KYOCERA Corporation
    Inventors: Michiaki NISHIMURA, Yasuhisa SHIGENAGA
  • Publication number: 20160336114
    Abstract: A laminated electronic component includes a main body including an effective layer in which dielectric layers and internal electrode layers are alternately laminated, and a pair of a first cover layer and a second cover layer which are disposed on opposite sides, respectively, in a stacking direction of the effective layer; and a plurality of external electrodes disposed on an outer surface of the main body. The internal electrode layers are alternately connected to the different external electrodes, and the first cover layer has a high-Young's modulus layer which is higher in Young's modulus than the dielectric layers. By mounting such a laminated electronic component to a substrate so that the first cover layer and a mounting face of the substrate are opposed to each other, it is possible to suppress acoustic noise.
    Type: Application
    Filed: January 16, 2015
    Publication date: November 17, 2016
    Applicant: KYOCERA Corporation
    Inventors: Michiaki NISHIMURA, Yasuhisa SHIGENAGA