Abstract: A solid-state imaging device 1 is provided with a plurality of photoelectric converting portions 3, a plurality of first transferring portions 5, a plurality of charge accumulating portions 7, a plurality of second transferring portions 9, and a shift register 11. Each photoelectric converting portion 3 has a photosensitive region 13 which has a planar shape of a nearly rectangular shape composed of two long sides and two short sides, and a potential gradient forming region 15 which forms a potential gradient increasing along a first direction directed from one short side to the other short side forming the planar shape of the photosensitive region 13. Bach first transferring portion 5 is arranged on the side of the other short side forming the planar shape of the corresponding photosensitive region 13 and transfers a charge acquired from the corresponding photosensitive region 13, in the first direction.

Abstract: A solid-state image pickup device 1 includes: a plurality of photoelectric converters 2 which are aligned in a predetermined direction and have a potential made higher toward one side of a direction crossing the predetermined direction; a transferring section 6 which is provided on one side of the photoelectric converters 2 in the direction crossing the predetermined direction and transfers charges generated in the photoelectric converters 2 in the predetermined direction; an unnecessary charge discharging drain 7 which is provided adjacent to the photoelectric converter 2 along the direction crossing the predetermined direction and discharges unnecessary charges generated in the photoelectric converter 2 from the photoelectric converter 2; and an unnecessary charge discharging gate 8 which is provided between the photoelectric converter 2 and the unnecessary charge discharging drain 7 and selectively performs cutting-off and release of the flow of unnecessary charges from the photoelectric converter 2 to the

Abstract: Provided are a wiring board capable of mounting either a frontside incident type solid-state imaging element and a backside incident type solid-state imaging element and a solid-state imaging device. The wiring board 1 is a wiring board having a to-be-arranged region 1a at which the solid-state imaging element is arranged, and is provided with a plurality of first electrode pads 12 formed inside the to-be-arranged region 1a and a plurality of second electrode pads 13 formed outside the to-be-arranged region 1a, each of which is electrically connected to each of the first electrode pads 12. Further, the solid-state imaging device mounts the backside incident type solid-state imaging element or the frontside incident type solid-state imaging element on the wiring board 1.

Abstract: A semiconductor energy detector includes a semiconductor substrate comprised of a semiconductor of a first conductivity type, into which an energy ray of a predetermined wavelength range is incident from an incident surface thereof. A semiconductor energy detector includes a plurality of diffusion regions of a second conductivity type comprised of a semiconductor of a second conductivity type and a diffusion region of the first conductivity type comprised of a semiconductor of the first conductivity type higher in impurity concentration than the semiconductor substrate. The diffusion regions of a second conductivity type and the diffusion region of the first conductivity type are provided on a surface opposite to the incident surface of said semiconductor substrate. Each first conductivity type semiconductor substrate side of pn junctions, formed at the area of interface between the semiconductor substrate and each of the diffusion regions of the second conductivity type, is commonly connected.

Abstract: A photodiode array 1 includes P+ diffusion regions 4 and 5, N+ channel stop layers 6 and 7, an N+ diffusion region 8 and the like. The P+ diffusion regions 4 and 5 and the N+ channel stop layers 6 and 7 are provided on a surface side opposite to an incident surface of a semiconductor substrate 3. The N+ channel stop layer 6 is provided between the P+ diffusion regions (the P+ diffusion regions 4 and 5; the P+ diffusion regions 4 and 4) adjacent to each other, and exhibits a form of lattice so as to separate the P+ diffusion regions (the P+ diffusion regions 4 and 5; the P+ diffusion regions 4 and 4). The N+ channel stop layer 7 is provided in the form of frame on the outside of an array of the P+ diffusion region 5 continuously with the N+ channel stop layer 6. The N+ channel stop layer 7 is set wider than the N+ channel stop layer 6.