Patents by Inventor Yasuko Miura

Yasuko Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180272190
    Abstract: An agent apparatus has an interface configured to obtain fitness data and training instruction data and an artificial intelligence unit configured to provide an artificial coach by analyzing the fitness data and the training instruction data.
    Type: Application
    Filed: March 15, 2018
    Publication date: September 27, 2018
    Applicant: Sony Corporation
    Inventors: Yasuko Miura, Teemu Veikko Tapani Pohjola, Vanessa Schelkens, Geert Premereur, Gaetan De Brucker, Johan Duyshaver
  • Publication number: 20140040259
    Abstract: There is provided an information processing apparatus including a user information manager that registers, in a database, registered device information in which devices specified by a user from among devices capable of realizing functions by linking together are associated with the user, a recommended function determiner that acquires, from the database, function information in which the functions and the devices are associated, and determines recommended functions for the user on the basis of the function information and the registered device information, and a procedure information manager that acquires, from the database, procedure information indicating operating procedures for realizing a function that the user selects from among the recommended functions, and provides the procedure information to the user.
    Type: Application
    Filed: July 1, 2013
    Publication date: February 6, 2014
    Inventors: Machiko TAKEMATSU, Yasuko MIURA, Tomoko TANAKA, Ryuji TANABE, Daisaku HAYASHI, Atsuhiro YAMAOKA, Takayuki FUJINAGA, Tsunayuki OHWA
  • Patent number: 6775754
    Abstract: When the power of a memory apparatus is turned on, data written to a designated area of a memory of the memory apparatus is loaded to a register. When an initial state detecting portion has detected that data loaded to the register is an initial value, a gate G0 is turned on. As a result, a designated area and a hidden area become accessible. When data that is different from the initial value is written to the designated area, the designated area and the hidden area are access-restricted. When a used state detecting circuit has detected that the used capacity of the memory matches a setup value, the gate G0 is turned on. As a result, the hidden area becomes accessible. Hidden data prewritten to the hidden area is information rewarded to the user or advertisement/commercial information.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: August 10, 2004
    Assignee: Sony Corporation
    Inventors: Takumi Okaue, Yasuko Miura
  • Publication number: 20020040423
    Abstract: When the power of a memory apparatus is turned on, data written to a designated area of a memory of the memory apparatus is loaded to a register. When an initial state detecting portion has detected that data loaded to the register is an initial value, a gate G0 is turned on. As a result, a designated area and a hidden area become accessible. When data that is different from the initial value is written to the designated area, the designated area and the hidden area are access-restricted. When a used state detecting circuit has detected that the used capacity of the memory matches a setup value, the gate G0 is turned on. As a result, the hidden area becomes accessible. Hidden data prewritten to the hidden area is information rewarded to the user or advertisement/commercial information.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 4, 2002
    Inventors: Takumi Okaue, Yasuko Miura