Patents by Inventor Yasumasa Watanabe

Yasumasa Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240116405
    Abstract: A clutch unit (100) includes an operation lever (21), an operation member (22), an input-side clutch (50), an output-side clutch (60), and a bottomed cylindrical housing (11). The input-side clutch (50) includes an input-side inner ring member (51) and an operation bracket (54). The operation bracket (54) includes an engagement portion (54b) that engages with the input-side inner ring member (51), a facing portion (54d) that faces the bottom surface (11 a) of the housing (11) with a gap therebetween, a fastened portion (54c) that penetrates a through hole (11h) formed in the bottom surface (11a) of the housing (11) and is fastened to the operation member (22), and a sliding-contact portion (54e) that extends from the facing portion (54d) toward the bottom surface (11a) of the housing (11) and comes into sliding-contact with the bottom surface of the housing (11).
    Type: Application
    Filed: January 26, 2022
    Publication date: April 11, 2024
    Applicants: SHIROKI CORPORATION, NTN CORPORATION
    Inventors: Kunihiro MIKASA, Yasumasa HIBI, Kyohei SASANUMA, Kengo WATANABE
  • Publication number: 20240003996
    Abstract: A magnetic sensor includes: a substrate; and a sensitive portion disposed on the substrate and having a longitudinal direction and a transverse direction. The sensitive portion senses a magnetic field by a magnetic impedance effect. The sensitive portion includes a soft magnetic material layer composed of a soft magnetic material having uniaxial magnetic anisotropy in a direction intersecting the longitudinal direction and sensing the magnetic field. The sensitive portion also includes a secondary soft magnetic material layer laminated between the substrate and the soft magnetic material layer. The secondary soft magnetic material layer is composed of a soft magnetic material with large saturation magnetization compared to the soft magnetic material constituting the soft magnetic material layer.
    Type: Application
    Filed: June 28, 2023
    Publication date: January 4, 2024
    Applicant: Resonac Corporation
    Inventors: Akira SAKAWAKI, Daizo ENDO, Sho TONEGAWA, Yasumasa WATANABE
  • Publication number: 20230209616
    Abstract: A wireless connection device comprises: a display unit; a pairing unit for pairing a plurality of communication terminals; a display control unit for displaying a query screen for querying whether or not to connect a first communication terminal with priority over another communication terminal when pairing has been established for the first communication terminal; a receiving unit for receiving an instruction for connecting the first communication terminal with priority over another communication terminal; a priority information control unit for storing a priority setting indicating the first communication terminal is to be connected with priority over another communication terminal; a detecting unit for detecting the presence of a plurality of communication terminals; and a connection control unit for connecting the first communication terminal when the detecting unit has detected the presence of the first communication terminal and the priority setting is stored in the storing unit.
    Type: Application
    Filed: December 9, 2022
    Publication date: June 29, 2023
    Applicant: Faurecia Clarion Electronics Co., Ltd.
    Inventors: Nobuhiro OHNO, Yasumasa WATANABE
  • Publication number: 20230009139
    Abstract: A magnetic sensor includes: plural sensitive elements 31 each including a soft magnetic material layer 105 having a longitudinal direction and a transverse direction and a conductor layer having higher conductivity than the soft magnetic material layer 105 and extending through the soft magnetic material layer 105 in a longitudinal direction, the sensitive element 31 having uniaxial magnetic anisotropy in a direction intersecting the longitudinal direction and being configured to sense a magnetic field by a magnetic impedance effect; and a connecting portion 32 continuous with the conductor layer of the sensitive element and configured to connect transversely adjacent sensitive elements 31 in series.
    Type: Application
    Filed: November 17, 2020
    Publication date: January 12, 2023
    Applicant: SHOWA DENKO K.K.
    Inventors: Daizo ENDO, Tatsunori SHINO, Akira SAKAWAKI, Sho TONEGAWA, Yasumasa WATANABE
  • Publication number: 20220381853
    Abstract: A magnetic sensor includes: a non-magnetic substrate; and a sensitive element 31 having a longitudinal direction and a short direction, provided with uniaxial magnetic anisotropy in a direction crossing the longitudinal direction, and sensing a magnetic field by a magnetic impedance effect, wherein the sensitive element 31 includes plural soft magnetic material layers 105a to 105d and plural non-magnetic material layers 106a to 106c configured with a non-magnetic material and laminated between the plural soft magnetic material layers 105a to 105d, and the soft magnetic material layers 105a to 105d facing each other with each of the non-magnetic material layers 106a to 106c interposed therebetween are antiferromagnetically coupled.
    Type: Application
    Filed: November 17, 2020
    Publication date: December 1, 2022
    Applicant: SHOWA DENKO K.K.
    Inventors: Daizo ENDO, Tatsunori SHINO, Akira SAKAWAKI, Sho TONEGAWA, Yasumasa WATANABE
  • Publication number: 20220128634
    Abstract: In a magnetic sensor using a magnetic impedance effect, sensitivity is improved as compared to the case where a width of a sensitive element in the short direction is equal from one end to the other end in the longitudinal direction. The magnetic sensor includes: a non-magnetic substrate; and a sensitive element that is provided on the substrate, composed of a soft magnetic material, having a longitudinal direction and a short direction, provided with uniaxial magnetic anisotropy in a direction crossing the longitudinal direction, having a width at a center portion in the longitudinal direction that is smaller compared to a width at each of both end portions in the longitudinal direction, and sensing a magnetic field by a magnetic impedance effect.
    Type: Application
    Filed: October 12, 2021
    Publication date: April 28, 2022
    Applicant: SHOWA DENKO K.K.
    Inventors: Sho TONEGAWA, Akira Sakawaki, Yasumasa Watanabe, Daizo Endo, Tomoyuki Noguchi, Yuta Miyamoto
  • Patent number: 10802730
    Abstract: Power consumption of a semiconductor device is reduced. A semiconductor device according to an embodiment includes a plurality of circuits, a bus circuit including a plurality of buffers that temporarily store communication data between the circuits and a plurality of arbitration circuits that arbitrate an access between the circuits and the buffers, a storage unit that stores information based on a use state of the buffers during communication between the circuits and configuration information including designation of unused circuits that are not used for the communication from among the circuits, and a control circuit that controls the bus circuit so as to stop use of unused buffers that are not used for the communication from among the buffers and at least a partial configuration in arbitration circuits corresponding to the unused circuits from among the arbitration circuits based on the configuration information.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: October 13, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yasumasa Watanabe, Mitsuhiro Ono, Toshiro Fujisaki, Kenji Kimura
  • Publication number: 20190171377
    Abstract: Power consumption of a semiconductor device is reduced. A semiconductor device according to an embodiment includes a plurality of circuits, a bus circuit including a plurality of buffers that temporarily store communication data between the circuits and a plurality of arbitration circuits that arbitrate an access between the circuits and the buffers, a storage unit that stores information based on a use state of the buffers during communication between the circuits and configuration information including designation of unused circuits that are not used for the communication from among the circuits, and a control circuit that controls the bus circuit so as to stop use of unused buffers that are not used for the communication from among the buffers and at least a partial configuration in arbitration circuits corresponding to the unused circuits from among the arbitration circuits based on the configuration information.
    Type: Application
    Filed: October 4, 2018
    Publication date: June 6, 2019
    Inventors: Yasumasa WATANABE, Mitsuhiro ONO, Toshiro FUJISAKI, Kenji KIMURA
  • Patent number: 7982524
    Abstract: A level shift circuit and a semiconductor device are configured to prevent failure and malfunction even when an excessive negative voltage or ESD surge are applied to a high-voltage power supply terminal. The level shift circuit includes a level shift resistor, a current-limiting resistor connected in series to the level shift resistor, and an n-channel MOSFET, with its drain connected to the current-limiting resistor. An output of the level-up circuit is obtained from the positioned between the level shift resistor and the current-limiting resistor. By providing the current-limiting resistor, the current that flows due to an excessive negative voltage or ESD surge is suppressed to prevent the level shift circuit from failing or malfunctioning.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: July 19, 2011
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Yuichi Harada, Yoshihiro Ikura, Yasumasa Watanabe, Katsunori Ueno
  • Patent number: 7652105
    Abstract: A hydroxyl-modified ethylene-?-olefin copolymer with excellent coating properties and adhesion properties are produced by heating a mixture containing 100 parts by weight of an ethylene-?-olefin copolymer and 0.1 to 20 parts by weight of a peroxide having a hydroperoxy group. The heating temperature is adjusted within a range from the 10-hour half-life temperature to the 1-minute half-life temperature of the peroxide.
    Type: Grant
    Filed: December 25, 2003
    Date of Patent: January 26, 2010
    Assignee: NOF Corporation
    Inventors: Yasumasa Watanabe, Tomoyuki Nakamura, Hiroshi Okada
  • Publication number: 20090309157
    Abstract: A MOS type semiconductor device, in which both improvement in radiation resistance and increase in withstand voltage is achieved, includes a nitride film formed on a LOCOS film and a PBSG film formed on the nitride film. The refractive index of the nitride film is set in a range of from 2.0 to 2.1 and the thickness of the nitride film is set in a range of from 0.1 Am to 0.5 ?m to thereby provide the nitride film as a semi-insulative thin film. Of electron-hole pairs produced in the LOCOS film by ?-ray irradiation, holes low in mobility are let away to a source electrode via the nitride film to thereby suppress the amount of plus fixed electric charges stored in the LOCOS film. The provision of such a three-layer structure permits improvement in radiation resistance and increase in withstand voltage.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 17, 2009
    Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
    Inventor: Yasumasa WATANABE
  • Publication number: 20090085117
    Abstract: A level shift circuit and a semiconductor device are configured to prevent failure and malfunction even when an excessive negative voltage or ESD surge are applied to a high-voltage power supply terminal. The level shift circuit includes a level shift resistor, a current-limiting resistor connected in series to the level shift resistor, and an n-channel MOSFET, with its drain connected to the current-limiting resistor. An output of the level-up circuit is obtained from the positioned between the level shift resistor and the current-limiting resistor. By providing the current-limiting resistor, the current that flows due to an excessive negative voltage or ESD surge is suppressed to prevent the level shift circuit from failing or malfunctioning.
    Type: Application
    Filed: May 30, 2008
    Publication date: April 2, 2009
    Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
    Inventors: Yuichi HARADA, Yoshihiro IKURA, Yasumasa WATANABE, Katsunori UENO
  • Patent number: 7476942
    Abstract: The SOI lateral semiconductor device includes a semiconductor region of a first conductivity type, a buried oxide film layer in the semiconductor region, a thin active layer on the buried oxide film layer, an anode region in the thin active layer, and a drain layer contacting the buried oxide film layer for confining the minority carriers injected from the anode region to the thin active layer within the thin active layer and for forming a structure that sustains a high breakdown voltage. The SOI lateral semiconductor device can provide a high breakdown voltage and low switching losses using the thin buried oxide film, which can be formed by an implanted oxygen (SIMOX) method.
    Type: Grant
    Filed: April 8, 2007
    Date of Patent: January 13, 2009
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Yasumasa Watanabe, Hideaki Teranishi, Naoto Fujishima
  • Publication number: 20070235804
    Abstract: The SOI lateral semiconductor device includes a semiconductor region of a first conductivity type, a buried oxide film layer in the semiconductor region, a thin active layer on the buried oxide film layer, an anode region in the thin active layer, and a drain layer contacting the buried oxide film layer for confining the minority carriers injected from the anode region to the thin active layer within the thin active layer and for forming a structure that sustains a high breakdown voltage. The SOI lateral semiconductor device can provide a high breakdown voltage and low switching losses using the thin buried oxide film, which can be formed by an implanted oxygen (SIMOX) method.
    Type: Application
    Filed: April 8, 2007
    Publication date: October 11, 2007
    Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
    Inventors: Yasumasa Watanabe, Hideaki Teranishi, Naoto Fujishima
  • Publication number: 20060025537
    Abstract: A hydroxyl-modified ethylene-?-olefin copolymer with excellent coating properties and adhesion properties are produced by heating a mixture containing 100 parts by weight of an ethylene-?-olefin copolymer and 0.1 to 20 parts by weight of a peroxide having a hydroperoxy group. The heating temperature is adjusted within a range from the 10-hour half-life temperature to the 1-minute half-life temperature of the peroxide.
    Type: Application
    Filed: December 25, 2003
    Publication date: February 2, 2006
    Inventors: Yasumasa Watanabe, Tomoyuki Nakamura, Hiroshi Okada
  • Patent number: 6111042
    Abstract: The novel polyfunctional peroxides are compounds represented by the following general formula (1):R.sup.1 -CX.sub.3 ( 1)wherein R.sup.1 represents a linear alkyl group having 1 to 3 carbon atoms; and X represents a group: ##STR1## (wherein R.sup.2 represents a linear or branched alkyl group having 1 to 5 carbon atoms). Such polyfunctional peroxides include 1,1,1-tris(t-butylperoxycarbonyloxymethyl)propane and the like. The polymerization initiators for vinyl monomers comprise such polyfunctional peroxides. In the process for polymerizing vinyl monomers, a vinyl monomer is polymerized employing such polyfunctional peroxide at 60 to 160.degree. C.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: August 29, 2000
    Assignee: NOF Corporation
    Inventors: Hideyo Ishigaki, Yasumasa Watanabe, Tomomi Satou
  • Patent number: 5973181
    Abstract: The novel polyfunctional peroxides are compounds represented by the following general formula (1):R.sup.1 --CX.sub.3 (1)wherein R.sup.1 represents a linear alkyl group having 1 to 3 carbon atoms; and X represents a group: ##STR1## (wherein R.sup.2 represents a linear or branched alkyl group having 1 to 5 carbon atoms).Such polyfunctional peroxides include 1,1,1-tris(t-butylperoxycarbonyloxymethyl)propane and the like. The polymerization initiators for vinyl monomers comprise such polyfunctional peroxides. In the process for polymerizing vinyl monomers, a vinyl monomer is polymerized employing such polyfunctional peroxide at 60 to 160.degree. C.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: October 26, 1999
    Inventors: Hideyo Ishigaki, Yasumasa Watanabe, Tomomi Satou
  • Patent number: 5258465
    Abstract: An ester type polymeric peroxide; has a peroxide group of the formula (I): ##STR1## a group of the formula (I') ##STR2## a group of the formula (II) ##STR3## wherein X stands for one member selected from the group consisting of --CH.sub.2 --CH.sub.2 --, --C.tbd.C-- and ##STR4## continuously bound such that I and I' occur randomly in alternation with II, having a (I):(I') molar ratio in the range of from 9:1 to 1:9 and the [(I)+(I')]:(II) molar ratio in the range of from 6:4 to 4:6, and having an average molecular weight in the range of from 1,000 to 20,000, a polymerization initiator for vinyl type monomer comprising said ester type polymeric peroxide and method for the production of a block copolymer of vinyl type monomer by said polymerization initiator.
    Type: Grant
    Filed: May 21, 1991
    Date of Patent: November 2, 1993
    Assignee: Nippon Oil & Fats Co., Ltd.
    Inventors: Shuji Suyama, Yasumasa Watanabe, Hideyo Ishigaki, Hiromi Kumura
  • Patent number: 4726072
    Abstract: Disclosed is a double converter tuner having an input circuit for performing first band control with respect to an input signal, amplifying a band-controlled input signal after automatic gain control is performed, and further performing second band control of a gain-controlled signal, a first IF (intermediate frequency) converter for converting an output generated from the input circuit to a first IF signal having a higher bandwidth than the reception bandwidth of the input signal, a first IF circuit for amplifying an output from the first IF converter, performing third band control and performing a further amplification, a second IF converter for converting an output generated from the first IF circuit to a second IF signal, and a second IF circuit for amplifying an output from the second IF converter, performing fourth band control, and performing another amplification. The first and second IF converters are arranged on different circuit boards to prevent frequency interference therebetween.
    Type: Grant
    Filed: January 9, 1987
    Date of Patent: February 16, 1988
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Sadahiko Yamashita, Makoto Hasegawa, Motoi Ohba, Tsutomu Shishido, Yasumasa Watanabe
  • Patent number: 4649315
    Abstract: Contact pieces are accommodated respectively in contact housings in a main body portion. Each of the contact pieces has an intermediate portion extending between a contact portion and a terminal portion and force-fitted and held as a first discharge electrode portion in first positioning grooves. An arcuate grounding conductor is disposed on the main body portion and has integral second discharge electrode portions and dust-prevention lug portions. The second discharge electrode portions are held in confronting and spaced relation to the first discharge electrode portions via discharge gap holes formed in a side wall portion of the main body and are force-fitted and held in second positioning grooves. The first and second discharge electrode portions define discharge gaps therebetween.
    Type: Grant
    Filed: February 19, 1985
    Date of Patent: March 10, 1987
    Assignee: Hosiden Electronics Co., Ltd.
    Inventors: Hirofumi Inaba, Yasumasa Watanabe