Patents by Inventor Yasunobu Hirao

Yasunobu Hirao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6203293
    Abstract: An electric fan apparatus including connectors that employ male terminals. Intermediate terminals are employed to connect the male terminals of the connectors. A fan motor is located behind a radiator to rotate a fan for producing air flow that cools the radiator. A controller controls the fan motor. A socket connector is provided on the fan motor or the controller. The socket connector has a sink for accommodating a male terminal. A plug connector is provided for engagement with the socket connector. The plug connector also has a sink for accommodating a male terminal. An intermediate terminal electrically connects the socket connector male terminal and the plug connector male terminal when the socket connector and the plug connector are engaged with each other. The intermediate terminal has back-to-back female ends that are fitted onto the male terminals to bridge the male terminals.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: March 20, 2001
    Assignees: ASMO Co., Ltd., Denso Corporation
    Inventors: Yoshiji Yamamoto, Hideo Ishiguro, Akitada Katou, Masanobu Gotou, Jyunji Sugiura, Yasunobu Hirao, Akiyoshi Yasunobe, Masatoshi Niigawa
  • Patent number: 6125798
    Abstract: A cooling apparatus for automotive use wherein speed of an electric cooling fan is controlled solely at a predetermined speed. When a relay switch is switched on, voltage of a battery is applied to a lag circuit. Output of the lag circuit is applied to a gate G of a MOS transistor, but rise of the gate-applied voltage is delayed by the lag circuit according to a time constant thereof, and increases slowly. When the gate-applied voltage reaches the threshold voltage of the MOS transistor, the MOS transistor begins to switch on. However, when the gate-applied voltage is low, the drain current flowing through the MOS transistor is limited and thereby surge current at the motor is minimized.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: October 3, 2000
    Assignee: Denso Corporation
    Inventors: Masatoshi Kuwayama, Yasunobu Hirao, Shigeru Takeuchi, Takafumi Ito
  • Patent number: 5657203
    Abstract: In order to provide an electronic device that has high package density and can facilitate electrical connection between a plurality of circuit boards therein, the electronic device comprises a frame having two mutually opposed openings through major planes, a plurality of circuit boards disposed in the frame parallel to the major plane, and mounted selected electronic circuits thereon respectively, and first and second closure lids for closing the openings in the major plane; the first closure lid contacting with the surface of at least one of the circuit boards, on which no electronic circuit is mounted. Also, on the inner wall of the frame; appropriate stepped portions are formed for supporting the closure lid member, the supporting plate, the circuit board and so forth, Furthermore, in the stepped portion, a portion to accommodate an excess amount of an adhesive is provided.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: August 12, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasunobu Hirao, Takashi Nagasaka, Hidekazu Katsuyama, Makoto Koyama, Yuji Motoyama, Mamoru Urushizaki, Yukihiro Maeda
  • Patent number: 5646827
    Abstract: In order to provide an electronic device that has high package density and can facilitate electrical connection between a plurality of circuit boards therein, the electronic device comprises a frame having two mutually opposed openings through major planes, a plurality of circuit boards disposed in the frame parallel to the major plane, and mounted selected electronic circuits thereon respectively, and first and second closure lids for closing the openings in the major plane; the first closure lid contacting with the surface of at least one of the circuit boards, on which no electronic circuit is mounted. Also, on the inner wall of the frame; appropriate stepped portions are formed for supporting the closure lid member, the supporting plate, the circuit board and so forth, Furthermore, in the stepped portion, a portion to accommodate an excess amount of an adhesive is provided.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: July 8, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasunobu Hirao, Takashi Nagasaka, Yuji Motoyama, Yukihiro Maeda
  • Patent number: 5586389
    Abstract: In order to provide an electronic device that has high package density and can facilitate electrical connection between a plurality of circuit boards therein, the electronic device comprises a frame having two mutually opposed openings through major planes, a plurality of circuit boards disposed in the frame parallel to the major plane, and mounted selected electronic circuits thereon respectively, and first and second closure lids for closing the openings in the major plane; the first closure lid contacting with the surface of at least one of the circuit boards, on which no electronic circuit is mounted. Also, on the inner wall of the frame; appropriate stepped portions are formed for supporting the closure lid member, the supporting plate, the circuit board and so forth, Furthermore, in the stepped portion, a portion to accommodate an excess amount of an adhesive is provided.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: December 24, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasunobu Hirao, Makoto Koyama, Yuji Motoyama
  • Patent number: 5586388
    Abstract: In order to provide an electronic device that has high package density and can facilitate electrical connection between a plurality of circuit boards therein, the electronic device comprises a frame having two mutually opposed openings through major planes, a plurality of circuit boards disposed in the frame parallel to the major plane, and mounted selected electronic circuits thereon respectively, and first and second closure lids for closing the openings in the major plane; the first closure lid contacting with the surface of at least one of the circuit boards, on which no electronic circuit is mounted. Also, on the inner wall of the frame; appropriate stepped portions are formed for supporting the closure lid member, the supporting plate, the circuit board and so forth, Furthermore, in the stepped portion, a portion to accommodate an excess amount of an adhesive is provided.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: December 24, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasunobu Hirao, Yuji Motoyama, Takashi Nagasaka, Hidekazu Katsuyama
  • Patent number: 5408383
    Abstract: In order to provide an electronic device that has high package density and can facilitate electrical connection between a plurality of circuit boards therein, the electronic device comprises a frame having two mutually opposed openings through major planes, a plurality of circuit boards disposed in the frame parallel to the major plane, and mounted selected electronic circuits thereon respectively, and first and second closure lids for closing the openings in the major plane; the first closure lid contacting with the surface of at least one of the circuit boards, on which no electronic circuit is mounted. Also, on the inner wall of the frame; appropriate stepped portions are formed for supporting the closure lid member, the supporting plate, the circuit board and so forth, Furthermore, in the stepped portion, a portion to accommodate an excess amount of an adhesive is provided.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: April 18, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Takashi Nagasaka, Yuji Motoyama, Yasunobu Hirao, Makoto Koyama, Mamoru Urushizaki, Hidekazu Katsuyama, Yukihiro Maeda