Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer provided on a portion of the first semiconductor layer, a third semiconductor layer provided on a portion of the second semiconductor layer and separated from the first semiconductor layer, a fourth semiconductor layer provided on an other portion of the first semiconductor layer, a first insulating film provided on a portion between the third semiconductor layer and the fourth semiconductor layer and on a portion of the fourth semiconductor layer at the second semiconductor layer side, a second insulating film contacting the first insulating film, a third insulating film provided above the second insulating film, and an electrode provided on the first insulating film, on the second insulating film, and on the third insulating film. The second insulating film is provided on the fourth semiconductor layer, and is thicker than the first insulating film.

Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer provided on a portion of the first semiconductor layer, a third semiconductor layer provided on a portion of the second semiconductor layer and separated from the first semiconductor layer, a fourth semiconductor layer provided on an other portion of the first semiconductor layer, a first insulating film provided on a portion between the third semiconductor layer and the fourth semiconductor layer and on a portion of the fourth semiconductor layer at the second semiconductor layer side, a second insulating film contacting the first insulating film, a third insulating film provided above the second insulating film, and an electrode provided on the first insulating film, on the second insulating film, and on the third insulating film. The second insulating film is provided on the fourth semiconductor layer, and is thicker than the first insulating film.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type, a first element including a second semiconductor layer of a second conductivity type, a second element including a third semiconductor layer of the second conductivity type, a first conductive member disposed in the first semiconductor layer between the first element and the second element, and a first semiconductor region of the second conductivity type provided inside the first semiconductor layer and contacting the first conductive member. A portion of the first element and a portion of the second element are formed in an upper layer portion of the first semiconductor layer. An upper end of the first conductive member is positioned higher than an upper end of the second semiconductor layer. A lower end of the first conductive member is positioned lower than lower ends of the second and third semiconductor layers.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region of a first conductivity type, a third semiconductor region of a second conductivity type, a fourth semiconductor region of the second conductivity type, a gate electrode, a first electrode, and a second electrode. The fourth semiconductor region includes a first portion and a second portion. The first portion is arranged with the second semiconductor region in a second direction crossing a first direction from the first semiconductor region to the second semiconductor region. The second portion is located above the third semiconductor region. The gate electrode is provided via a gate insulating layer on another part of the second semiconductor region, part of the third semiconductor region, and the first portion. The first electrode is provided on another part of the third semiconductor region. The second electrode is provided on the second portion.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region of a first conductivity type, a third semiconductor region of a second conductivity type, a fourth semiconductor region of the second conductivity type, a gate electrode, a first electrode, and a second electrode. The fourth semiconductor region includes a first portion and a second portion. The first portion is arranged with the second semiconductor region in a second direction crossing a first direction from the first semiconductor region to the second semiconductor region. The second portion is located above the third semiconductor region. The gate electrode is provided via a gate insulating layer on another part of the second semiconductor region, part of the third semiconductor region, and the first portion. The first electrode is provided on another part of the third semiconductor region. The second electrode is provided on the second portion.

Abstract: A semiconductor device includes a semiconductor substrate, a semiconductor layer, a first electrode, and a first insulating film. The semiconductor layer is provided on the semiconductor substrate. The semiconductor layer includes first-fifth regions. The first region includes a first portion and a second portion arranged with the first portion. The second region is provided in a surface of the first portion. The third region is provided between the second portion and the second region in the surface of the first portion. The fourth region is provided between the second portion and the third region in the surface of the first portion. The fifth region is provided in a surface of the fourth region. The first electrode is provided between the fifth region and the second portion on the semiconductor layer. The first insulating film is provided between the semiconductor layer and the first electrode.

Abstract: A semiconductor device includes a semiconductor substrate, a semiconductor layer, a first electrode, and a first insulating film. The semiconductor layer is provided on the semiconductor substrate. The semiconductor layer includes first-fifth regions. The first region includes a first portion and a second portion arranged with the first portion. The second region is provided in a surface of the first portion. The third region is provided between the second portion and the second region in the surface of the first portion. The fourth region is provided between the second portion and the third region in the surface of the first portion. The fifth region is provided in a surface of the fourth region. The first electrode is provided between the fifth region and the second portion on the semiconductor layer. The first insulating film is provided between the semiconductor layer and the first electrode.

Abstract: A semiconductor device includes a diode formed by making use of a DMOS transistor structure. In addition to such a DMOS transistor structure, the semiconductor device includes a second buried layer of the first conductivity type being provided on a first buried layer of a second conductivity type that is in a floating state. Moreover, the second buried layer of the first conductivity type and a second diffusion region of the first conductive type are connected by a first diffusion region of the first conductivity type. A first electrode is set as anode, and a second electrode and a third electrode are short-circuited and set as cathode.

Abstract: A semiconductor device includes a P-type substrate 1, an N-type buried layer 2, a P-type buried layer 3, N-type epitaxial layers 4, P-type diffusion layers 6, P-type diffusion layers 8, P-type diffusion layers 11, first electrodes formed on the P-type diffusion layers 11, N-type diffusion layers 9, P-type diffusion layers 12, N-type diffusion layers 13, second electrodes formed on the P-type diffusion layers 12 and the N-type diffusion layers 13, and gate electrodes 10 short-circuited with the second electrodes. The N-type buried layer 2 is in a floating state.

Abstract: A semiconductor device having a diffusion layer comprising: a semiconductor substrate of a first conductivity type comprising first and second portions having first and second impurity density, respectively, the first portion located so as to surround the second portion; a transistor having a first diffusion layer and a gate electrode, the first diffusion layer of the transistor formed in the first portion of the semiconductor substrate and having a third impurity density; and a semiconductor well of a second conductivity type formed between the first portion and the second portion of the semiconductor substrate, the semiconductor well having a fourth impurity density and formed so as to surround the first portion of the semiconductor substrate and located in the second portion of the semiconductor substrate.