Patents by Inventor Yasunori Morinaga

Yasunori Morinaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220241509
    Abstract: A crack resistant member including a member body, a first region that is a hollow space provided in the member body to open to a surface of the member body and is configured to dispose a driving part that outputs a pressing force in an extension direction of the space, and a coupling portion that is configured to mechanically couple to the driving part and is formed on an inner wall surface of the first region, in which at least the coupling portion is formed from a resin material having a flexural modulus of 2600 MPa or greater as measured in accordance with ISO 178.
    Type: Application
    Filed: December 27, 2019
    Publication date: August 4, 2022
    Applicant: DAICEL CORPORATION
    Inventor: Yasunori MORINAGA
  • Patent number: 10483125
    Abstract: A semiconductor device includes a first interlayer film formed on an upper surface of a substrate, a first metal wiring line, a second interlayer film, a second metal wiring line, a first via electrically connecting the first metal wiring line and the second metal wiring line, a landing pad embedded in an upper portion of the first interlayer film and penetrating the second interlayer film, and a second via penetrating the substrate and the first interlayer film from a back side of the substrate and connected to the landing pad. The lower surface position of the landing pad is different from that of the first metal wiring line.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: November 19, 2019
    Assignee: TOWERJAZZ PANASONIC SEMICONDUCTOR CO., LTD.
    Inventors: Yuka Inoue, Mitsunori Fukura, Nobuyoshi Takahashi, Masahiro Oda, Hisashi Yano, Yutaka Ito, Yasunori Morinaga
  • Publication number: 20180366342
    Abstract: A semiconductor device includes a first interlayer film formed on an upper surface of a substrate, a first metal wiring line, a second interlayer film, a second metal wiring line, a first via electrically connecting the first metal wiring line and the second metal wiring line, a landing pad embedded in an upper portion of the first interlayer film and penetrating the second interlayer film, and a second via penetrating the substrate and the first interlayer film from a back side of the substrate and connected to the landing pad. The lower surface position of the landing pad is different from that of the first metal wiring line.
    Type: Application
    Filed: August 28, 2018
    Publication date: December 20, 2018
    Inventors: Yuka INOUE, Mitsunori FUKURA, Nobuyoshi TAKAHASHI, Masahiro ODA, Hisashi YANO, Yutaka ITO, Yasunori MORINAGA
  • Patent number: 8486832
    Abstract: A trench is formed in an interlayer dielectric formed on a substrate, then a barrier seed film is formed to cover the interlayer dielectric and the inner walls of the trench, and copper is embedded in the trench by electrolytic plating using the barrier seed film as an electrode. The barrier seed film is a single-layer film made of an oxide or nitride of a refractory metal and contains a low-resistance metal other than copper.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: July 16, 2013
    Assignee: Panasonic Corporation
    Inventors: Yasunori Morinaga, Hideo Nakagawa
  • Patent number: 8338290
    Abstract: A method for fabricating a semiconductor device includes: (a) forming an interlayer insulating film on a substrate; (b) forming an interconnect in the interlayer insulating film; (c) applying an organic solution to an upper surface of the interconnect and an upper surface of the interlayer insulating film; (d) after (c), applying a silylating solution to the upper surface of the interconnect and the upper surface of the interlayer insulating film; (e) after (d), heating the substrate; and (f) forming a first liner insulating film at least on the upper surface of the interconnect.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: December 25, 2012
    Assignee: Panasonic Corporation
    Inventor: Yasunori Morinaga
  • Publication number: 20110250750
    Abstract: A method for fabricating a semiconductor device includes: (a) forming an interlayer insulating film on a substrate; (b) forming an interconnect in the interlayer insulating film; (c) applying an organic solution to an upper surface of the interconnect and an upper surface of the interlayer insulating film; (d) after (c), applying a silylating solution to the upper surface of the interconnect and the upper surface of the interlayer insulating film; (e) after (d), heating the substrate; and (f) forming a first liner insulating film at least on the upper surface of the interconnect.
    Type: Application
    Filed: June 17, 2011
    Publication date: October 13, 2011
    Applicant: PANASONIC CORPORATION
    Inventor: Yasunori MORINAGA
  • Patent number: 8017518
    Abstract: A method for manufacturing a semiconductor device includes the steps of: (a) forming a low dielectric constant film over a semiconductor substrate; (b) forming a recess in the low dielectric constant film; (c) after the step (b), sequentially performing the steps of (c1) applying an organic solution to the low dielectric constant film and (c2) silylating the low dielectric constant film with a silylating solution; and (d) after the step (c), embedding a metal in the recess to form at least one of a via plug and a metal wiring in the low dielectric constant film. Performing the step (c1) before the step (c2) improves a penetration property of the silylating solution into the low dielectric constant film.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: September 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Yasunori Morinaga, Hideo Nakagawa
  • Patent number: 7923522
    Abstract: The invention provides a preparation process of organic-group-modified zeolite fine particles excellent in stability of particle size and to be used for electronic materials or the like. The preparation process comprises a first step of obtaining a liquid containing zeolite seed crystals having a particle size of 80 nm or less which are formed in the presence of a structure directing agent, a second step of adding an organic-group-containing hydrolyzable silane compound to the liquid obtained by the first step, and a third step of maturing the liquid of the second step at temperature higher than that of the first step. A dispersion liquid of zeolite fine particles obtained by the process.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: April 12, 2011
    Assignees: Shin-Etsu Chemical Co., Ltd., Panasonic Corporation
    Inventors: Yoshitaka Hamada, Masaru Sasago, Hideo Nakagawa, Yasunori Morinaga
  • Patent number: 7909979
    Abstract: The present invention provides a water photolysis system comprising: a casing 1 into which incident sunlight L can enter from the outside and a photolytic layer 5 which is disposed inside the casing 1; wherein the photolytic layer 5 has a light-transmissive porous material 51 and photocatalyst particles 52 supported thereon; a water layer 4 containing water in its liquid state is disposed below the photolytic layer 5 with a first space 6 disposed between the water layer and the photolytic layer; a sealed second space 7 is formed above the photolytic layer 5 in the casing 1; vapor generated from the water layer 4 is introduced into the photolytic layer 5 via the first space 6; and the vapor is decomposed into hydrogen and oxygen by the photocatalyst particles 52, which are excited by the sunlight L.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: March 22, 2011
    Assignee: Panasonic Corporation
    Inventors: Yuka Yamada, Masa-aki Suzuki, Nobuyasu Suzuki, Hidehiro Sasaki, Yasunori Morinaga
  • Publication number: 20090188783
    Abstract: The present invention provides a water photolysis system comprising: a casing 1 into which incident sunlight L can enter from the outside and a photolytic layer 5 which is disposed inside the casing 1; wherein the photolytic layer 5 has a light-transmissive porous material 51 and photocatalyst particles 52 supported thereon; a water layer 4 containing water in its liquid state is disposed below the photolytic layer 5 with a first space 6 disposed between the water layer and the photolytic layer; a sealed second space 7 is formed above the photolytic layer 5 in the casing 1; vapor generated from the water layer 4 is introduced into the photolytic layer 5 via the first space 6; and the vapor is decomposed into hydrogen and oxygen by the photocatalyst particles 52, which are excited by the sunlight L.
    Type: Application
    Filed: April 3, 2009
    Publication date: July 30, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Yuka YAMADA, Masa-aki SUZUKI, Nobuyasu SUZUKI, Hidehiro SASAKI, Yasunori MORINAGA
  • Patent number: 7566438
    Abstract: An object of the present invention is to provide an oxygen reduction electrode having excellent oxygen reduction properties (oxygen reduction catalyst abilities). The present invention encompasses: (1) A method for manufacturing a nanostructured manganese oxide having a dendritic structure formed from an agglomeration of primary particles, wherein the method comprises the steps of: removing components from a target plate that comprises one or more kinds of manganese oxides by irradiating the target plate with laser light in an atmosphere comprising a mixed gas of inert gas and oxygen gas, the content of the oxygen gas in the mixed gas being no less than 0.05% but no more than 0.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: July 28, 2009
    Assignee: Panasonic Corporation
    Inventors: Nobuyasu Suzuki, Yasunori Morinaga, Hidehiro Sasaki, Yuka Yamada
  • Publication number: 20090170314
    Abstract: A method for manufacturing a semiconductor device includes the steps of: (a) forming a low dielectric constant film over a semiconductor substrate; (b) forming a recess in the low dielectric constant film; (c) after the step (b), sequentially performing the steps of (c1) applying an organic solution to the low dielectric constant film and (c2) silylating the low dielectric constant film with a silylating solution; and (d) after the step (c), embedding a metal in the recess to form at least one of a via plug and a metal wiring in the low dielectric constant film. Performing the step (c1) before the step (c2) improves a penetration property of the silylating solution into the low dielectric constant film.
    Type: Application
    Filed: December 22, 2008
    Publication date: July 2, 2009
    Inventors: Yasunori Morinaga, Hideo Nakagawa
  • Patent number: 7476607
    Abstract: An object of the present invention is to provide a photovoltaic cell that demonstrates a superior photoelectric conversion function. The present invention relates to a photovoltaic cell comprising a semiconductor electrode, an electrolyte and a counter electrode, wherein (1) the semiconductor electrode contains an oxide semiconductor layer having photocatalytic activity, (2) the oxide semiconductor layer contains secondary particles in which primary particles comprising a metal oxide are aggregated, (3) the average particle diameter of the primary particles is from 1 nm to 50 nm, and the average particle diameter of the secondary particles is from 100 nm to 10 ?m, and (4) the photovoltaic cell generates electromotive force by radiating light of a wavelength substantially equal to the average particle diameter of the secondary particles onto the semiconductor electrode.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: January 13, 2009
    Assignee: Panasonic Corporation
    Inventors: Yuka Yamada, Nobuyasu Suzuki, Yasunori Morinaga, Hidehiro Sasaki
  • Publication number: 20080283413
    Abstract: It is an object of the present invention to provide an oxygen reduction electrode which provides four-electron reduction reaction with high selectivity in the reaction of reducing oxygen. The present invention involves a method of manufacturing an electrode for reducing oxygen used for four-electron reduction of oxygen, having (1) a first step wherein a charcoal-based material is obtained by carbonization of a starting material comprising a nitrogen-containing synthetic polymer, and (2) a second step wherein the electrode for reducing oxygen is manufactured using an electrode material comprising the charcoal-based material.
    Type: Application
    Filed: December 28, 2007
    Publication date: November 20, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masa-aki Suzuki, Yuka Yamada, Nobuyasu Suzuki, Yasunori Morinaga, Hidehiro Sasaki, Tadashi Sotomura, Mitsuru Hashimoto, Masahiro Deguchi, Akira Taomoto, Toyokazu Ozaki
  • Publication number: 20080248280
    Abstract: The invention provides a preparation process of organic-group-modified zeolite fine particles excellent in stability of particle size and to be used for electronic materials or the like. The preparation process comprises a first step of obtaining a liquid containing zeolite seed crystals having a particle size of 80 nm or less which are formed in the presence of a structure directing agent, a second step of adding an organic-group-containing hydrolyzable silane compound to the liquid obtained by the first step, and a third step of maturing the liquid of the second step at temperature higher than that of the first step. A dispersion liquid of zeolite fine particles obtained by the process.
    Type: Application
    Filed: April 1, 2008
    Publication date: October 9, 2008
    Inventors: Yoshitaka Hamada, Masaru Sasago, Hideo Nakagawa, Yasunori Morinaga
  • Publication number: 20080188076
    Abstract: A trench is formed in an interlayer dielectric formed on a substrate, then a barrier seed film is formed to cover the interlayer dielectric and the inner walls of the trench, and copper is embedded in the trench by electrolytic plating using the barrier seed film as an electrode. The barrier seed film is a single-layer film made of an oxide or nitride of a refractory metal and contains a low-resistance metal other than copper.
    Type: Application
    Filed: September 10, 2007
    Publication date: August 7, 2008
    Inventors: Yasunori Morinaga, Hideo Nakagawa
  • Patent number: 7390474
    Abstract: Conventional porous carbon materials obtained by carbonizing an organic gel were prone to shrinkage during their manufacture, in the course of which the density rose and the specific surface area decreased. Another problem was that density and specific surface area were difficult to control after an organic gel had already been formed. In the present invention, a carbon material with a large specific surface area is formed by forming a composite porous material having a reticulated skeleton and composed of a dry gel of an inorganic oxide, and taking advantage of the reaction of this dry gel of an inorganic oxide as a structural support. In one method, a carbon material is formed in this reticulated skeleton in a state in which the characteristics of a dry gel of an inorganic oxide with a large specific surface area are maintained.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: June 24, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masa-aki Suzuki, Hidehiro Sasaki, Yasunori Morinaga, Masahiro Deguchi, Yuka Yamada, Nobuyasu Suzuki
  • Patent number: 7338582
    Abstract: It is an object of the present invention to provide an oxygen reduction electrode having excellent oxygen reduction catalysis ability. In a method of manufacturing a manganese oxide nanostructure having excellent oxygen reduction catalysis ability and composed of secondary particles which are aggregations of primary particles of manganese oxide, a target plate made of manganese oxide is irradiated with laser light to desorb the component substance of the target plate, and the desorbed substance is deposited on a substrate facing substantially parallel to the aforementioned target plate.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: March 4, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyasu Suzuki, Yasunori Morinaga, Hidehiro Sasaki, Yuka Yamada
  • Publication number: 20070256735
    Abstract: It is an object of the present invention to provide a porous body containing an oxide semiconductor in which more efficient photocatalytic reactions and photoelectrode reactions occur. The present invention relates to a porous body having a network structure skeleton wherein 1) the aforementioned skeleton is composed of an inner part and a surface part, 2) the aforementioned inner part is substantially made of carbon material, and 3) all or part of the aforementioned surface part is an oxide semiconductor, and to a manufacturing method therefor.
    Type: Application
    Filed: July 17, 2007
    Publication date: November 8, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yuka Yamada, Masa-aki Suzuki, Nobuyasu Suzuki, Yasunori Morinaga, Hidehiro Sasaki
  • Patent number: 7256147
    Abstract: It is an object of the present invention to provide a porous body containing an oxide semiconductor in which more efficient photocatalytic reactions and photoelectrode reactions occur. The present invention relates to a porous body having a network structure skeleton wherein 1) the aforementioned skeleton is composed of an inner part and a surface part, 2) the aforementioned inner part is substantially made of carbon material, and 3) all or part of the aforementioned surface part is an oxide semiconductor, and to a manufacturing method therefor.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: August 14, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuka Yamada, Masa-aki Suzuki, Nobuyasu Suzuki, Yasunori Morinaga, Hidehiro Sasaki